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• DECnet
  | DAP: Data Access Protocol<BR> ! Data link
  17 KB (2,405 words) - 17:43, 13 January 2024
• QBUS
  ...]] lines (to reduce the pin count), as opposed to the separate address and data lines of the UNIBUS. Another was that although it also supported 4 levels o ...write cycle); and interrupt cycles, in which a device causes the [[Central Processing Unit|CPU]] to perform an interrupt.
  13 KB (2,043 words) - 23:27, 14 January 2024
• UNIBUS
  ...S]], and thus supported several capabilities: the ability of the [[Central Processing Unit|CPU]] to read and write [[main memory]], and device [[register]]s; and The UNIBUS contained 16 data lines, and 18 [[address]] lines, as well as a number of control lines. The
  13 KB (2,162 words) - 23:26, 14 January 2024
• PDP-11/34
  The [[Central Processing Unit|CPU]] came in two variants: the [[KD11-E CPU|KD11-E]] (M7265 and M7266 | 777711 || Source data
  4 KB (536 words) - 19:28, 8 February 2024
• PDP-11/20
  ...duced the [[UNIBUS]] as a universal path to connect together the [[Central Processing Unit|CPU]], [[main memory]] and [[peripheral|devices]]. ...pe puncher/reader. The front panel had lights and switches for address and data (the lights were not LED's).
  6 KB (900 words) - 19:27, 31 December 2023
• PDP-11/24
  ...Kbytes of EUB main memory, using a cross-connection path on the [[Central Processing Unit|CPU]] board. If no KT24 was present, the CPU detected its absence, and ...d devices. The two buses were not entirely separated: they shared a set of data lines, but each bus had a separate complete set of address lines. (The lowe
  8 KB (1,395 words) - 23:37, 29 February 2024
• PDP-11/44
  ...relying instead on the UNIBUS, and [[Extended UNIBUS|EUB]]. Its [[Central Processing Unit|CPU]], the [[KD11-Z CPU|KD11-Z]], was the last PDP-11 CPU to be made o ...All devices were attached to a semi-separate UNIBUS (it and the EUB shared data lines, but not [[address]] lines); [[Direct Memory Access|DMA]] devices cou
  4 KB (584 words) - 23:42, 29 February 2024
• PDP-11/45
  ...prior to 1976) or [[KB11-D CPU]] (later units) high-performance [[Central Processing Unit|CPUs]], implemented in [[SSI]] [[Schottky TTL]] logic. ...a fast CPU-memory interconnect. It also introduced split I/D (Instruction/Data) spaces (UNIX used this; the DEC operating systems did not), an MMU (Memory
  6 KB (895 words) - 23:52, 29 February 2024
• PDP-11/70
  ...IBUS]] [[PDP-11]] system; it basically took the high-performance [[Central Processing Unit|CPU]] of the [[PDP-11/45]] (implemented in [[SSI]] [[Schottky TTL]] lo ...R-xx [[flat cable]]s; two for the [[address]] and control, and two for the data. They run from [[Berg connector]] headers on boards in the KB11 CPU's cache
  5 KB (729 words) - 23:43, 29 February 2024
• PDP-11 architecture
  The [[Central Processing Unit|CPU]] had 8 [[general register|general purpose registers]]; the [[oper ...provide a variety of additional operand types, such as immediate (literal) data, absolute and relative addresses, and stack operations; very impressive on
  13 KB (1,949 words) - 17:37, 29 February 2024
• VAX-11/780
  {{InfoboxVAX-Data The [[Central Processing Unit|CPU]] was the [[KA780 CPU]]. It could take an optional [[floating poin
  8 KB (1,030 words) - 21:30, 25 April 2024
• VAX-11/782
  {{InfoboxVAX-Data ...ocessor|dual processor]] [[VAX]]; it had two [[KA780 CPU|KA780]] [[Central Processing Unit|CPUs]] connected to up to four [[MA780 Multiport Memory Option|MA780]]
  3 KB (420 words) - 09:14, 15 July 2023
• VAX-11/750
  {{InfoboxVAX-Data ...ne which connected all the major functional units, including the [[Central Processing Unit|CPU]], [[main memory]], and I/O bus adapters, was the [[CPU/Memory Int
  8 KB (1,079 words) - 21:52, 7 April 2024
• PDP-8/E
  ...'PDP-8/F''' was a cost-reduced version of the -8/E with the same [[Central Processing Unit|CPU]], but only a single OMNIBUS [[backplane]]. The '''PDP-8/M''' is t * KD8-E [[OMNIBUS|Data Break]] Interface
  4 KB (618 words) - 14:11, 14 July 2023
• MOS Technology 6502
  ...ntroduced at around $25 it was the least expensive full-featured [[Central Processing Unit|CPU]] on the market by a considerable margin, costing less than one-si ...witch between 16 [[bank switching|banks]] of 64KB memory. The address bus, data bus, and R/W signal are tri-state, unlike the 6502, and the state is contro
  8 KB (1,369 words) - 17:59, 25 June 2021
• VAX-11/730
  {{InfoboxVAX-Data ...way of extensive [[microcoding]] of the large architecture, the [[Central Processing Unit|CPU]] was shrunk to three [[DEC card form factor|hex]] boards. The mac
  5 KB (708 words) - 12:22, 29 March 2023
• Timeline of Norsk Data
  * In July, Norsk Data-Elektronikk is founded. * The company changes name from "NORDATA Norsk Data-Elektronikk" to "Norsk Data A/S"
  7 KB (950 words) - 12:59, 23 August 2016
• NORD-10
  | manufacturer = [[Norsk Data]] ...plications and for [[real-time]] multiprogram systems, produced by [[Norsk Data]]. It was introduced in 1973. The later follow up model, NORD-10/S, introdu
  8 KB (1,313 words) - 13:52, 11 July 2023
• MicroVAX I
  {{InfoboxVAX-Data ...n|DEC]]. It used the [[QBUS]] as its primary [[bus]] between the [[Central Processing Unit|CPU]] (the [[KD32 CPU]]) and [[main memory]], the only [[VAX]] to do s
  10 KB (1,525 words) - 21:20, 10 January 2024
• MicroVAX II
  {{InfoboxVAX-Data ...II''' was a small [[VAX]], with the [[KA630 CPU‎‎]] for its [[Central Processing Unit|CPU]]. Its [[bus]] between the CPU and [[main memory]] was a special b
  5 KB (708 words) - 23:09, 10 April 2024

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