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  • 2.6.3 PDP-11 compatibility................. 18 2.9BSD has vfork for the PDP-11. 4.3BSD will eliminate
    113 KB (13,419 words) - 02:06, 17 December 2018
  • The '''KL10''' was the third generation of [[PDP-10]] processors. It was built out of [[Emitter-coupled logic|ECL]], on [[DEC card form fact ...]]s; they allowed connection of a [[PDP-11]] [[front end]]. At least one PDP-11, the 'master', was ''required''; it could [[bootstrap]] the KL10, including
    11 KB (1,737 words) - 13:06, 2 April 2024
  • ...''KA10''' was the first generation of [[PDP-10]] [[Central Processing Unit|processors]] (themselves, exact re-implementations of the earlier [[PDP-6]] architectu [[Category: PDP-10 Processors]]
    2 KB (298 words) - 07:28, 6 September 2023
  • The '''KI10''' was the second generation of [[PDP-10]] processors (themselves, exact re-implementations of the earlier [[PDP-6]] architecture [[Category: PDP-10 Processors]]
    3 KB (382 words) - 13:23, 5 November 2023
  • [[Image:KY11-LB.jpg|thumb|right|300px|A KY11-LB Programmer's Console on a PDP-11/04]] ...1-LB Programmer's Console''' was an option for the [[PDP-11/04]] and the [[PDP-11/34]] (the units for the two machines differed only in the number painted on
    7 KB (1,114 words) - 20:56, 24 October 2022
  • ...the progenitor of the semi-standard [[FP11 floating point]] used in many [[PDP-11]]s. [[Category: PDP-11 UNIBUS Processors]]
    1 KB (201 words) - 02:17, 13 October 2022
  • ...ogenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s. [[Category: PDP-11 UNIBUS Processors]]
    1 KB (209 words) - 02:18, 13 October 2022
  • ...rd form factor|quad-height]] board, and is used in the [[PDP-11/83]] and [[PDP-11/84]] systems. ...rts the [[KTJ11-B UNIBUS adapter]], a QBUS->[[UNIBUS]] adapter used in the PDP-11/84.
    2 KB (391 words) - 16:40, 6 February 2024
  • ...rd form factor|quad-height]] board, and is used in the [[PDP-11/93]] and [[PDP-11/94]] systems. [[Category: PDP-11 QBUS Processors]]
    2 KB (254 words) - 16:41, 6 February 2024
  • ...apability to systems built around those CPU cards, the [[PDP-11/84]] and [[PDP-11/94]] systems respectively. ...ed as regular Q22/CD QBUS slots, by removing two jumpers. EK-PDP84-TM-PR4 (PDP-11/84 Technical Manual) says (in section 2.1.14, "Backplane (H9277-A)", pg. 2-
    6 KB (1,060 words) - 16:35, 6 February 2024
  • ...ing Unit|CPU]] of the [[PDP-11/20]], the first [[PDP-11]]. It was the only PDP-11 CPU which was not [[microcode]]d (since the cheap [[read-only memory|ROMs]] ...a 16x16 [[register file]], of which half are used to hold the machine's [[PDP-11 architecture|general registers]]; two of the others are used for internal t
    9 KB (1,356 words) - 23:10, 29 February 2024
  • The '''KDF11 CPUs''' are single-[[printed circuit board|board]] [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Fonz' [[F-11 chip set ...] - M8186 - [[QBUS]] [[DEC card form factor|dual]]-width CPU used in the [[PDP-11/23]]
    3 KB (394 words) - 13:49, 29 March 2022
  • ...e other [[KDF11 CPUs]]. It plugs into a custom slot in the likewise custom PDP-11/24 [[backplane]] ([[DEC part number]] 54-13817, assembly 70-16905). ...ouble-width [[KEF11-B CIS chip|KEF11-B]] 6-chip carrier implementing the [[PDP-11 Commercial Instruction Set]] (CIS) (not all KDF11 CPUs can hold this). In a
    6 KB (1,087 words) - 16:16, 6 February 2024
  • There are several single-board [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Jaws' [[J-11 chipset] ...M8190 - QBUS quad-width CPU used in the [[PDP-11/73]], [[PDP-11/83]] and [[PDP-11/84]]
    3 KB (457 words) - 14:32, 21 February 2023
  • ...ed 'Fonz') was [[DEC]]'s second [[microprocessor]] implementation of the [[PDP-11 architecture]]. It was used in the [[KDF11 CPUs]]. The main [[Central Proce ...e optional [[KTF11-A memory management chip]] which implemented standard [[PDP-11 Memory Management]], and the optional [[KEF11-A floating point chip]] which
    2 KB (384 words) - 23:50, 28 March 2022
  • [[Category: PDP-11 Processors]]
    181 bytes (30 words) - 16:09, 16 December 2018
  • ...point chip''' is an optional [[integrated circuit|chip]] for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It contains [[microcode]] to implem [[Category: PDP-11 Processors]]
    899 bytes (153 words) - 17:43, 12 March 2021
  • .... It implemented the standard [[PDP-11 Memory Management]] (but only the [[PDP-11 Memory Management#Simplified subset|simplified subset]]). [[Category: PDP-11 Processors]]
    762 bytes (124 words) - 13:41, 12 August 2022
  • ...nt]] unit for the [[KD11-A CPU]] of the [[PDP-11/40]]. It implements the [[PDP-11]] [[FIS floating point]], not the full [[FP11 floating point]]. [[Category: PDP-11 UNIBUS Processors]]
    2 KB (246 words) - 02:34, 12 October 2022
  • ...1-E CPU''' was the first [[Central Processing Unit|CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit bo ...t|floating point]] unit or the [[KK11-A Cache Memory|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.
    5 KB (791 words) - 02:23, 6 December 2022

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