Difference between revisions of "M9312 ROM"

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(Copyedit, mention special diag ROMs for 11/70, /60)
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The board occupied addresses 773000-773776 (high ROM) and 765000-765776 (low ROM); a configuration jumper allowed the lower block to be disabled.
 
The board occupied addresses 773000-773776 (high ROM) and 765000-765776 (low ROM); a configuration jumper allowed the lower block to be disabled.
  
−
Configuration switches controlled which address the CPU jumped to on power on (a clever kludge, controlled by one configuration switch, allowed the board to force the CPU to read its power-on [[Program Counter|PC]] and [[Processor Status Word|PS]] from the ROM, at a location set by other configuration switches, thereby allowing auto-boot on power-on).
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==ROMs==
 +
 
 +
The contents of the standard PROMs from [[Digital Equipment Corporation|DEC]] provided a console emulator, basic [[Central Processing Unit|CPU]] and [[main memory]] diagnostics, and the ability to [[bootstrap]] the machine from [[disk]], [[magnetic tape]], etc; however, the board could be used for any purpose.
 +
 
 +
The board used five 4-bit wide PROMs to hold the data; the DEC-supplied pre-programmed PROMs included the console emulator and diagnostics in one ROM, and the other four to hold the selected bootstraps (selected from a large set available from DEC, see below).
  
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==ROMs==
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The diagnostics include i) primary CPU tests, ii) secondary CPU tests, and a memory test. The primary tests are performed before entering the console emulator; if a failure is detected, the processor goes into an infinite loop at the failing test. The secondary tests and memory test are run when a boot command is given from the console emulator.
  
−
The standard ROM contents provided the ability to [[bootstrap]] the machine, from [[disk]], [[magnetic tape]], etc, but the board could be used for any purpose.
+
There were two different emulator/diagnostic PROMs; one for the [[PDP-11/70]] and [[PDP-11/60]], which check the machine's [[cache]], and one for all the other PDP-11 models.
  
−
The DEC-supplied pre-programmed ROMs included a console emulator, and basic diagnostics; the diagnostics include i) primary CPU tests, ii) secondary CPU tests, and a memory test. The primary tests are performed before entering the console emulator; if a failure is detected, the processor goes into an infinite loop at the failing test. The secondary tests and memory test are run when a boot command is given from the console emulator.
+
==Configuration==
  
−
The board used five 4-bit wide PROMs to hold the data: one for the basic console and diagnostics, and the other four to hold the selected bootstraps (selected from a large set available from DEC, see below).
+
The board was configured using both a single 10-switch [[DIP]] switch, S1, and a number of jumpers, together with they control the board's behaviour.
  
−
==Configuration switches==
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===Switches===
  
−
The board contains a single 10-switch [[DIP]] switch, S1, which together with a number of jumpers, controls the board's behaviour.
+
Configuration switches control which address the CPU jumps to on power on.
  
−
If S1-1 is set to 'off' (open), the new PS and PC loaded on power-on will point to the high ROM; if 'on' (closed), it will be in the low ROM.
+
A clever kludge, controlled by one configuration switch, allowed the board to force the CPU to read its power-on [[Program Counter|PC]] and [[Processor Status Word|PS]] from the ROM, at a location set by other configuration switches, thereby allowing auto-boot on power-on. If S1-1 is set to 'off' (open), the new PS and PC loaded on power-on will point to the high ROM; if 'on' (closed), it will be in the low ROM.
  
 
If S1-2 is 'off', the system will power-up normally; if 'on', the CPU will obtain its new PC/PS pair from locations 173024 on the card, which contain a mixture of bits from the ROM (high bits) and the configuration switches (low bits), which can be used to force the CPU to start executing in the ROM on power-on.
 
If S1-2 is 'off', the system will power-up normally; if 'on', the CPU will obtain its new PC/PS pair from locations 173024 on the card, which contain a mixture of bits from the ROM (high bits) and the configuration switches (low bits), which can be used to force the CPU to start executing in the ROM on power-on.
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Switches S1-3 through S1-10 contain bits 8 through 1 of the power-on PC (above).
 
Switches S1-3 through S1-10 contain bits 8 through 1 of the power-on PC (above).
  
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==Configuration jumpers==
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===Jumpers===
  
 
* W1-W5 - When inserted, termination is provided for the [[bus grant line]]s of the UNIBUS.
 
* W1-W5 - When inserted, termination is provided for the [[bus grant line]]s of the UNIBUS.

Revision as of 23:24, 16 December 2017

The M9312 ROM card was a UNIBUS card for the PDP-11 series of computers. It contained 512 words of ROM memory, all readable directly from the UNIBUS (i.e. not windowed). The M9312 also provided termination for the UNIBUS.

It was a dual format card, intended for use in the two top (AB) sections of a MUD slot, or in a UNIBUS in/out slot.

The board occupied addresses 773000-773776 (high ROM) and 765000-765776 (low ROM); a configuration jumper allowed the lower block to be disabled.

ROMs

The contents of the standard PROMs from DEC provided a console emulator, basic CPU and main memory diagnostics, and the ability to bootstrap the machine from disk, magnetic tape, etc; however, the board could be used for any purpose.

The board used five 4-bit wide PROMs to hold the data; the DEC-supplied pre-programmed PROMs included the console emulator and diagnostics in one ROM, and the other four to hold the selected bootstraps (selected from a large set available from DEC, see below).

The diagnostics include i) primary CPU tests, ii) secondary CPU tests, and a memory test. The primary tests are performed before entering the console emulator; if a failure is detected, the processor goes into an infinite loop at the failing test. The secondary tests and memory test are run when a boot command is given from the console emulator.

There were two different emulator/diagnostic PROMs; one for the PDP-11/70 and PDP-11/60, which check the machine's cache, and one for all the other PDP-11 models.

Configuration

The board was configured using both a single 10-switch DIP switch, S1, and a number of jumpers, together with they control the board's behaviour.

Switches

Configuration switches control which address the CPU jumps to on power on.

A clever kludge, controlled by one configuration switch, allowed the board to force the CPU to read its power-on PC and PS from the ROM, at a location set by other configuration switches, thereby allowing auto-boot on power-on. If S1-1 is set to 'off' (open), the new PS and PC loaded on power-on will point to the high ROM; if 'on' (closed), it will be in the low ROM.

If S1-2 is 'off', the system will power-up normally; if 'on', the CPU will obtain its new PC/PS pair from locations 173024 on the card, which contain a mixture of bits from the ROM (high bits) and the configuration switches (low bits), which can be used to force the CPU to start executing in the ROM on power-on.

Switches S1-3 through S1-10 contain bits 8 through 1 of the power-on PC (above).

Jumpers

  • W1-W5 - When inserted, termination is provided for the bus grant lines of the UNIBUS.
  • W6 - In for machines with push-button boot capability
  • W7 - Always in
  • W8 - When inserted, the low bank of memory on the card (765000-765777) is disabled; when removed, it is enabled.
  • W9-W10 - Out for use with a PDP-11/60; in for all others
  • W11-W12 - In for use with a PDP-11/60; out for all others

Connector tabs

The board contains four connector tabs, which may be used with a pair of external switches, to control the board's behaviour.

Two, TP2 and TP3, are ground returns (for TP1 and TP4, respectively). TP1, when momemtarily grounded, forces the machine to execute a power-fail/restart sequence (by asserting UNIBUS line ACLO). TP4, when grounded, forces the machine to execute the on-board ROM on power on, no matter what the position of S1-2 (above).

PROM variants

The following table lists the DEC standard PROMs by part number, and the devices (and device code) they support. When a particular PROM suppports more than one type of device, the second device type is indicated with a '*' after the part number.

ROM part # Device Controller Device Code
23-751A9 RL01/RL02 disk RL11 DL
23-752A9 RK06/RK07 disk RK611 DM
23-753A9 RX01 floppy RX11 DX
23-811A9 RX02 floppy RX211 DY
23-755A9 RP02/RP03 disk RP11 DP
23-755A9* RP04/RP05/RP06, RM02/RM03 disk RH11, RH70 DB
23-756A9 RK03/RK05 disk RK11 DK
23-756A9* TU55/TU56 DECtape TC11 DT
23-757A9 TU16/TE16 magtape TM02, TM03 MM
23-758A9 TU10/TE10/TS03 magtape TM11 MT
23-759A9 RS03/RS04 fixed disk RH11, RH70 DS
23-760A9 PC05 high-speed reader PC11 PR
23-760A9* console low-speed reader DL11 TT
23-761A9 TU60 DECcassette TA11 CT
23-762A9 RS11 fixed disk RF11 RS
23-762A9* RS64 fixed disk RC11 RS
23-763A9 card reader CR11 CR
23-764A9 TS04, TU80 magtape TS11, TU80K MS
23-765A9 TU58 DECtapeII DL11 DD

See also

External links

Reference

  • EK-M9312-TM-003, M9312 bootstrap/terminator module technical manual
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