Difference between revisions of "KD11-E CPU"

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[[Image:KD11-E M7266.jpg|250px|right|thumb|M7266 Control card]]
 
[[Image:KD11-E M7266.jpg|250px|right|thumb|M7266 Control card]]
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==Implementation==
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 +
The KD11-E makes heavy use of [[Read-only memory#PROM|PROMs]], to hold the microcode, to control the [[arithmetic logic unit|ALU]], provide [[trap]] [[address]]es, and for [[instruction]] decoding. The latter is partially accomplished in microcode, but with extensive assistance from an Instruction Decoder largely implemented in PROMs. The latter has several functional sub-units:
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* DOP Decoder, double-[[operand]] instructions
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* SOP Decoder, single-operand instructions
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* Branch Decoder, [[branch]] instructions
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* Operate Decoder, [[condition codes]] instructions
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 +
The Instruction Decoder also checks for illegal instructions, and illegal [[PDP-11 architecture#Addressing modes|addressing modes]] on otherwise-legal instructions.
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The microcode is 48 [[bit]]s wide, stored in 12 512x4 PROMs:
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{| class="wikitable"
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! Chip !! [[DEC part number]]!! Bits
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|-
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| E97 || 23-021A9 || B, BX, OVX CTL
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|-
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| E98 || 23-022A9 || SSMUX CTL, AMUX CTL
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|-
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| E99 || 23-020A9 || FUNC CODE 01-03
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|-
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| E100 || 23-023A9 || BUT BITS
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|-
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| E102 || 23-025A9 || FORCE K, BUT SERV, PREV, FORCE RSV1
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|-
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| E103 || 23-024A9 || SPA SRC SEL0-1, SPA DST SEL0-1
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|-
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| E104 || 23-026A9 || ROM SPA 00-03
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|-
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| E105 || 23-019A9 || LOAD BA, LONG CYC, AUX SETUP, FUNC CODE 04
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|-
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| E106 || 23-018A9 || BUF DAT TRAN, BUF C0/C1, ENAB MAINT
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|-
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| E107 || 23-017A9 || MPC00, Misc Control
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|-
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| E108 || 23-016A9 || MPC01-04
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|-
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| E109 || 23-015A9 || MPC05-08
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|}
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The Instruction Decoder uses 13 PROMs, of differing sizes:
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{| class="wikitable"
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! Chip !! [[DEC part number]] !! Size !! Function
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|-
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| E52 || 23-175A2 || 256x4 || Trap Decoder
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|-
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| E53 || 23-162A2 || 256x4 || Reset/Trap Decode
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|-
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| E58 || 23-174A2 || 256x4 || SOP Decode
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|-
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| E59 || 23-173A2 || 256x4 || SOP Microbranch
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|-
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| E60 || 23-161A2 || 256x4 || SOP ALU Control
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|-
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| E61 || 23-170A2 || 256x4 || Rotate/Shift ALU Control
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|-
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| E62 || 23-176A2 || 256x4 || Op Branch
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|-
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| E67 || 23-014A9 || 512x4 || Condition Codes
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|-
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| E68 || 23-172A2 || 256x4 || DOP Decoder
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|-
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| E69 || 23-171A2 || 256x4 || DOP Decoder
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|-
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| E71 || 23-22A2 || 256x4 || Branch Decoder
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|-
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| E73 || 23-110A1 || 32x8 || [[PDP-11 Extended Instruction Set|EIS]] Decoder
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|-
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| E81 || 23-107A1 || 32x8 || DOP ALU Control
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|}
  
 
==KY11-LB Interface==
 
==KY11-LB Interface==
  
 
The microcode diagnostic interface to the KY11-LB is carried over two 10-wire [[flat cable]]s with female [[Berg connector]]s connected to [[wire-wrap]] pin groups (denominated J1 and J2) in the upper left corner of the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)
 
The microcode diagnostic interface to the KY11-LB is carried over two 10-wire [[flat cable]]s with female [[Berg connector]]s connected to [[wire-wrap]] pin groups (denominated J1 and J2) in the upper left corner of the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)
 
{{semi-stub}}
 
  
 
==See also==
 
==See also==

Revision as of 16:32, 10 February 2022

M7265 Data Paths card

The KD11-E CPU was the first CPU version for the PDP-11/34; it consisted of two hex printed circuit boards, the M7265 Data Paths module and the M7266 Control module. They plugged into a modified MUD backplane, the DD11-P backplane, which was customized for the KD11-E.

Although it supported the KY11-LB Programmer's Console, including the diagnostic functionality which allow the CPU's microcode to be single-stepped, it did not support the FP11-A floating point unit or the KK11-A cache; a PDP-11/34 system needed the upgraded KD11-EA CPU for that.

M7266 Control card

Implementation

The KD11-E makes heavy use of PROMs, to hold the microcode, to control the ALU, provide trap addresses, and for instruction decoding. The latter is partially accomplished in microcode, but with extensive assistance from an Instruction Decoder largely implemented in PROMs. The latter has several functional sub-units:

  • DOP Decoder, double-operand instructions
  • SOP Decoder, single-operand instructions
  • Branch Decoder, branch instructions
  • Operate Decoder, condition codes instructions

The Instruction Decoder also checks for illegal instructions, and illegal addressing modes on otherwise-legal instructions.

The microcode is 48 bits wide, stored in 12 512x4 PROMs:

Chip DEC part number Bits
E97 23-021A9 B, BX, OVX CTL
E98 23-022A9 SSMUX CTL, AMUX CTL
E99 23-020A9 FUNC CODE 01-03
E100 23-023A9 BUT BITS
E102 23-025A9 FORCE K, BUT SERV, PREV, FORCE RSV1
E103 23-024A9 SPA SRC SEL0-1, SPA DST SEL0-1
E104 23-026A9 ROM SPA 00-03
E105 23-019A9 LOAD BA, LONG CYC, AUX SETUP, FUNC CODE 04
E106 23-018A9 BUF DAT TRAN, BUF C0/C1, ENAB MAINT
E107 23-017A9 MPC00, Misc Control
E108 23-016A9 MPC01-04
E109 23-015A9 MPC05-08

The Instruction Decoder uses 13 PROMs, of differing sizes:

Chip DEC part number Size Function
E52 23-175A2 256x4 Trap Decoder
E53 23-162A2 256x4 Reset/Trap Decode
E58 23-174A2 256x4 SOP Decode
E59 23-173A2 256x4 SOP Microbranch
E60 23-161A2 256x4 SOP ALU Control
E61 23-170A2 256x4 Rotate/Shift ALU Control
E62 23-176A2 256x4 Op Branch
E67 23-014A9 512x4 Condition Codes
E68 23-172A2 256x4 DOP Decoder
E69 23-171A2 256x4 DOP Decoder
E71 23-22A2 256x4 Branch Decoder
E73 23-110A1 32x8 EIS Decoder
E81 23-107A1 32x8 DOP ALU Control

KY11-LB Interface

The microcode diagnostic interface to the KY11-LB is carried over two 10-wire flat cables with female Berg connectors connected to wire-wrap pin groups (denominated J1 and J2) in the upper left corner of the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)

See also

External links