The M9312 ROM card was a UNIBUS card for the PDP-11 series of computers. It contained 512 words of ROM memory, all readable directly from the UNIBUS (i.e. not windowed). The M9312 also provided termination for the UNIBUS.
The board occupied addresses 773000-773776 (high ROM) and 765000-765776 (low ROM); a configuration jumper allowed the lower block to be disabled.
The contents of the standard PROMs from DEC provided a console emulator, basic CPU and main memory diagnostics, and the ability to bootstrap the machine from disk, magnetic tape, etc; a command to boot the machine could be given in the emulator, using a symbolic device code. However, the board could be used for any purpose.
The board used five 4-bit wide PROMs to hold the data; the DEC-supplied pre-programmed PROMs included the console emulator and diagnostics in one ROM, and the other four to hold the selected bootstraps (selected from a large set available from DEC, see below).
The diagnostics include i) primary CPU tests, ii) secondary CPU tests, and a memory test. The primary tests are performed before entering the console emulator; if a failure is detected, the processor goes into an infinite loop at the failing test. The secondary tests and memory test are run when a boot command is given from the console emulator.
The board was configured using both a single 10-switch DIP switch, S1, and a number of jumpers, together with they control the board's behaviour.
Configuration switches control which address the CPU jumps to on power on.
A clever kludge, controlled by one configuration switch, allowed the board to force the CPU to read its power-on PC and PS from the ROM, at a location set by other configuration switches, thereby allowing auto-boot on power-on. If S1-1 is set to 'off' (open), the new PS and PC loaded on power-on will point to the high ROM; if 'on' (closed), it will be in the low ROM.
If S1-2 is 'off', the system will power-up normally; if 'on', the CPU will obtain its new PC/PS pair from locations 173024 on the card, which contain a mixture of bits from the ROM (high bits) and the configuration switches (low bits), which can be used to force the CPU to start executing in the ROM on power-on.
Switches S1-3 through S1-10 contain bits 8 through 1 of the power-on PC (above).
- W1-W5 - When inserted, termination is provided for the bus grant lines of the UNIBUS.
- W6 - In for machines with push-button boot capability
- W7 - Always in
- W8 - When inserted, the low bank of memory on the card (765000-765777) is disabled; when removed, it is enabled.
- W9-W10 - Out for use with a PDP-11/60; in for all others
- W11-W12 - In for use with a PDP-11/60; out for all others
The board contains four connector tabs, which may be used with a pair of external switches, to control the board's behaviour.
Two, TP2 and TP3, are ground returns (for TP1 and TP4, respectively). TP1, when momemtarily grounded, forces the machine to execute a power-fail/restart sequence (by asserting UNIBUS line ACLO). TP4, when grounded, forces the machine to execute the on-board ROM on power on, no matter what the position of S1-2 (above).
The following table lists the DEC standard PROMs by part number, and the devices they support. When a particular PROM suppports more than one type of device, the second device type is indicated with a '*' after the part number.
|ROM part #||Device||Controller|
|23-755A9*||RP04/RP05/RP06, RM02/RM03 disk||RH11, RH70|
|23-757A9||TU16/TE16 magtape||TM02, TM03|
|23-759A9||RS03/RS04 fixed disk||RH11, RH70|
|23-760A9||PC05 high-speed reader||PC11|
|23-760A9*||console low-speed reader||DL11|
|23-762A9||RS11 fixed disk||RF11|
|23-762A9*||RS64 fixed disk||RC11|
|23-764A9||TS04, TU80 magtape||TS11, TU80K|
- EK-M9312-TM-003, M9312 bootstrap/terminator module technical manual