Difference between revisions of "ITS machine configurations"

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m (AI KA10: link Fabritek Core Memory)
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* 'KL-UDGE' LH 1822 interface (maybe a clock, too)
 
* 'KL-UDGE' LH 1822 interface (maybe a clock, too)
  
==AI KS10==
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==KS10's==
  
The [[KS10]]'s were all pretty stock, hardware-wise; like the KL10, they also ran custom microcode. Also:
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[[File:AI+MC_KS10s.jpg|350px|thumb|right|The AI (left) and MC (probably; perhaps ML) KS10s]]
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The [[KS10]]'s were all pretty stock, hardware-wise; like the KL10, they also ran custom microcode.
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===AI KS10===
  
 
* Disk [[RH11 MASSBUS controller]]
 
* Disk [[RH11 MASSBUS controller]]

Revision as of 02:13, 17 November 2024

The configuration of the various Incompatible Timesharing System time-sharing PDP-10 mainframes at MIT (in the AI Lab, where it was born, and in LCS, only other organization to run it 'in production') are given here. They were all physically in Technology Square.

AI PDP-6

  • The first PDP-6 at MIT. At first, in only had 16KW of core memory. A 256KW Fabritek Core Memory was delivered summer 1966, but not fully working until a year later. When time-sharing moved to the newer PDP-10, the PDP-6 was reduced to the 16KW memory again.
  • One console teletype.
  • In summer 1966, the teletype logic was modified by Tom Knight to support four more teletypes.
  • GE Datanet 760 with four CRT consoles.
  • MAR and one-proceed to support debugging under time-sharing.
  • Briefly, Analex disk drive.
  • Data Disc M-6 disk drives.
  • IBM 2311 disk interface.

DM PDP-6

  • 32K core memory.

AI KA10

The AI machine was the first KA10 at MIT. It was initially installed as a 'slave' processor to the AI PDP-6 in a tightly-coupled multi-processor; later the two machines swapped roles. It was the first KA10 there to support virtual memory (an MIT custom modification).

The 'Arpanet Resources Handbook' gives the speed of the two mobies as 2.8 μseconds and 1.1 μseconds; the former seems to be the Fabritek, so the other must be the Ampex.

DM KA10

Another KA10, with a Systems Concepts DM-10 paging box, and also:

  • 2 x 128KW MD10's
  • a collection of other DEC early memory boxes (MA10's and/or MB10's) totalling 256KW
  • RP10
  • Its DF10
  • TM10B
  • Its DF10 (or did it share the other one?)
  • Metcalfe DH 1822 interface
  • Morton serial line box

ML KA10

Another KA10 with a DM-10, and also:

  • 4 x 128KW MD10's
  • RP10
    • 4 x RP03's
    • 4 x Calcomp 215's
  • Its DF10
  • TM10A
    • TU20
  • DH 1822 interface
  • eventually, a CH10

MC KL10

MC processor, with KL-UDGE to the left.

The CPU was a stock Model A; it ran custom microcode, though, to implement the 'MIT paging box'. The main memory and channels were also 100% stock. Also:

KS10's

The AI (left) and MC (probably; perhaps ML) KS10s

The KS10's were all pretty stock, hardware-wise; like the KL10, they also ran custom microcode.

AI KS10

MC KS10

No tape drive; backups must have been done over the Chaosnet.

  • Disk RH11
    • RP06
  • LH-DH/11
  • CH11
  • DZ11

ML KS10

  • Disk RH11
    • RP06
  • CH11
  • 4 x DZ11

MD KS10

  • Disk RH11
  • CH11
  • 4 x DZ11

See also

External links