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• PDP-11
  ...1/84]] and [[PDP-11/94]]) actually contained QBUS processors with a QBUS<->UNIBUS adapter board. | [[PDP-11/20|11/20]] || 1969[1] ||[[UNIBUS]] || 16-bit || no || ||
  10 KB (1,393 words) - 16:03, 23 April 2024
• QBUS
  ...duction in the [[LSI-11]]), was intended as a cheaper alternative to the [[UNIBUS]] general system [[bus]] from [[Digital Equipment Corporation|DEC]]. It was While similar to the UNIBUS, both at a high level, in that it supported both [[main memory]] and [[peri
  13 KB (2,043 words) - 23:27, 14 January 2024
• VAX-11/782
  The VAX-11/782 consists of two VAX-11/780 processors and a 4-Mbyte MA780 shared main memory mounted between the VAX CPU cabinets ..., a shared memory interface, and a [[DW780 Unibus Adapter|DW780]] [[UNIBUS|Unibus]] Adapter.
  3 KB (420 words) - 09:14, 15 July 2023
• PDP-10
  DEC sold 4 different generations of PDP-10 processors: the [[KA10]], the [[KI10]], the [[KL10]], and the small [[KS10]]. All exce ...bus, which appeared only on the main [[backplane]]. For I/O, it used the [[UNIBUS]] and (via [[RH11 MASSBUS controller|RH11]]'s) the [[MASSBUS]].
  11 KB (1,640 words) - 20:59, 8 March 2024
• A UNIX™ Operating System for the DEC VAX-11/780 Computer
  ...ith the PDP-11 can quickly understand the differences. The VAX-11 provides UNIBUS and MASSBUS interfaces and uses the same input/output peripheral devices as * UNIBUS adaptor with DZ11 (8 RS-232C lines)
  49 KB (7,745 words) - 14:29, 6 May 2023
• TPA-11/580
  ::* ''Adapters of other busses like UNIBUS (UBA), MASSBUS (MBA) ...to 18-bit UNIBUS addresses, handles DMA and data buffering (The UBA does 4 UNIBUS-cycles on one SBI cycle).
  4 KB (587 words) - 00:38, 2 January 2024
• KD11-E/EA microcode
  [[Category: PDP-11 UNIBUS Processors]]
  31 KB (3,760 words) - 05:02, 5 November 2022
• Bug fixes and changes in 4.1bsd
  standard 11/750 packages, UNIBUS TM-11 tape emulators tm Supports the UNIBUS TM/11 emulating tape con-
  39 KB (5,307 words) - 05:01, 11 December 2018
• UNIX* System V and 4.1C BSD
  4. VAX, PDP, UNIBUS, MASSBUS, and SBI are Trademarks of several processors and compatibility with certain other
  113 KB (13,419 words) - 02:06, 17 December 2018
• KL10
  The '''KL10''' was the third generation of [[PDP-10]] processors. It was built out of [[Emitter-coupled logic|ECL]], on [[DEC card form fact All low-speed devices were generally attached to the [[UNIBUS]] of one of the PDP-11 front ends (which could also be attached via a [[DL1
  11 KB (1,737 words) - 13:06, 2 April 2024
• KY11-LB Programmer's Console
  ...t]], and for the CPU to acknowledge that it has honoured that request. The UNIBUS SACK signal is also used as part of the halt functionality. Note that only the [[Modified Unibus Device|MUD]] backplanes ([[DD11-C backplane|DD11-C]], [[DD11-D backplane|DD
  7 KB (1,114 words) - 20:56, 24 October 2022
• FP11-B Floating-Point Processor
  [[Category: PDP-11 UNIBUS Processors]]
  1 KB (201 words) - 02:17, 13 October 2022
• FP11-C Floating-Point Processor
  [[Category: PDP-11 UNIBUS Processors]]
  1 KB (209 words) - 02:18, 13 October 2022
• KDJ11-B CPU
  ...nt of the QBUS; it also supports the [[KTJ11-B UNIBUS adapter]], a QBUS->[[UNIBUS]] adapter used in the PDP-11/84. [[Category: PDP-11 QBUS Processors]]
  2 KB (391 words) - 16:40, 6 February 2024
• KTJ11-B UNIBUS adapter
  ...11-E CPU|KDJ11-E]] [[QBUS]] [[Central Processing Unit|CPU]] cards to add [[UNIBUS]] capability to systems built around those CPU cards, the [[PDP-11/84]] and ...in memory]] cards), a special slot in the middle for the KTJ11-B, and then UNIBUS slots.
  6 KB (1,060 words) - 16:35, 6 February 2024
• KA11 CPU
  ...s connection is to allow the KA11 to serve as the 'bus arbitrator' for the UNIBUS. Only the Data Paths section can pass data to the Bus Interface section. The DATIP (read with expected write to follow) UNIBUS cycle, especially useful for [[core memory]] (which must write the date bac
  9 KB (1,356 words) - 23:10, 29 February 2024
• KDF11 CPUs
  * [[KDF11-U CPU]] - M7133 - [[UNIBUS]] hex-width CPU used in the [[PDP-11/24]] ...he KEF11-A is installed; is unusual that it can plug into either a QBUS or UNIBUS [[backplane]], since it draws only power from the backplane - all [[signal]
  3 KB (394 words) - 13:49, 29 March 2022
• KDF11-U CPU
  ...e 'Fonz' [[F-11 chip set]] as the other KDF11 CPUs; however, it used the [[UNIBUS]], unlike the [[QBUS]] of the other [[KDF11 CPUs]]. It plugs into a custom ...DF11-U usually operates with the optional [[UNIBUS map]] board, the [[KT24 UNIBUS map option|KT24]].
  6 KB (1,087 words) - 16:16, 6 February 2024
• KE11-F Floating Instruction Set
  [[Category: PDP-11 UNIBUS Processors]]
  2 KB (246 words) - 02:34, 12 October 2022
• KD11-E CPU
  ...nd the '''M7266''' Control module. They plugged into a modified [[Modified UNIBUS Device|MUD]] [[backplane]], the [[DD11-P backplane]], which was customized ...ctionality of the KY11-B [[KY11-L to CPU interface|is performed]] over the UNIBUS, and a pair of backplane lines.
  5 KB (791 words) - 02:23, 6 December 2022
• KD11-EA CPU
  [[Category: PDP-11 UNIBUS Processors]]
  6 KB (1,045 words) - 22:47, 31 March 2022
• KY11-LA Operator's Console
  In addition to several standard [[UNIBUS]] signals (SACK, INIT, DCLO and ACLO), it also used a pair of additional ba [[Category: PDP-11 UNIBUS Processors]]
  2 KB (358 words) - 18:29, 3 April 2022
• VAX 8200
  ...d the [[VAX Bus Interconnect|VAXBI]] [[bus]]; it can support an optional [[UNIBUS]] adapter. ...-20 of the PDF) and covered in detail in Chapter 5, "VAX 8200 and VAX 8300 Processors" (pp. 86-102 of the PDF)
  2 KB (208 words) - 23:08, 28 March 2024
• VAX 8300
  ...d the [[VAX Bus Interconnect|VAXBI]] [[bus]]; it can support an optional [[UNIBUS]] adapter. ...-20 of the PDF) and covered in detail in Chapter 5, "VAX 8200 and VAX 8300 Processors" (pp. 86-102 of the PDF)
  2 KB (210 words) - 23:10, 28 March 2024
• KS10
  The '''KS10''' was the fourth and last generation of [[PDP-10]] processors (themselves, exact re-implementations of the earlier [[PDP-6]] architecture ...Processing Unit|CPU]], the [[main memory]] controller, and two or three [[UNIBUS]] adapters (which are used to perform all [[input/output|I/O]] in the syste
  8 KB (1,237 words) - 19:48, 14 July 2023
• FP11-A Floating-Point Processor
  [[Category: PDP-11 UNIBUS Processors]]
  4 KB (734 words) - 02:17, 13 October 2022
• KK11-A Cache Memory
  ...ing two data bytes; a tag field for cache entries, 7 bits wide (covering [[UNIBUS]] address bits 17-11); 3 [[parity]] bits (one for the tag); and two valid b [[Category: PDP-11 UNIBUS Processors]]
  4 KB (553 words) - 02:36, 12 October 2022
• KD11-A CPU
  ...US [[Small Peripheral Controller|SPC]] slot; that slot also contained the 'UNIBUS out'. | 9 || colspan="2" style="text-align:center;" | UNIBUS Out || colspan="4" style="text-align:center;" | SPC
  4 KB (588 words) - 05:52, 8 April 2024
• DL10 PDP-11 Data Link
  ...also up to two [[PDP-10 I/O Bus]]ses (allowing it to be controlled by both processors in a multi-[[Central Processing Unit|CPU]] system). So, it could be connect ...DL10, which allows the PDP-10 to start and stop the PDP-11; the PDP-11's [[UNIBUS]] runs into the DL10 and is plugged into the DL10's backplane.
  5 KB (664 words) - 17:27, 7 November 2023
• MINITS
  ...[graphics terminal]]s, and provide [[Chaosnet]] [[front end]]s to [[KL10]] processors. * [[UNIBUS Experimental Ethernet interface|3 Mbit Ethernet]] interface
  3 KB (347 words) - 08:50, 27 February 2024
• KD11-B CPU
  ...as a bus arbitrator, so that the machine can be a 'slave' processor, on a UNIBUS controlled by another CPU. [[Category: PDP-11 UNIBUS Processors]]
  11 KB (1,726 words) - 21:07, 2 July 2023
• KB11-A CPU
  In addition to [[main memory]] on the [[UNIBUS]], the KB11-A could also use the special high-speed [[MS11 Semiconductor Me * M8104 Processor Data and UNIBUS Registers
  3 KB (395 words) - 21:08, 2 July 2023
• KB11-D CPU
  In addition to [[main memory]] on the [[UNIBUS]], the KB11-A could also use the special high-speed [[MS11 Semiconductor Me * M8104 Processor Data and UNIBUS Registers
  2 KB (307 words) - 12:32, 11 October 2022
• KT11-C Memory Management Unit
  [[Category: PDP-11 UNIBUS Processors]]
  2 KB (231 words) - 02:38, 12 October 2022
• KE11-E Extended Instruction Set
  [[Category: PDP-11 UNIBUS Processors]]
  2 KB (304 words) - 02:33, 12 October 2022
• FP11-F Floating-Point Processor
  [[Category: PDP-11 UNIBUS Processors]]
  961 bytes (149 words) - 02:20, 13 October 2022
• KD11-Z CPU
  ...t|chips]], and not a [[microprocessor]], and also nearly the last native [[UNIBUS]] CPU (except for the [[KDF11-U CPU|KDF11-U]]). ...ess to the memory via a [[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses.
  4 KB (668 words) - 15:59, 6 February 2024
• KB11-B CPU
  ...o the memory via a [[UNIBUS map]] which connected the two, and also mapped UNIBUS addresses to main memory addresses. High-speed devices could be attached to * M8134 Processor Data and UNIBUS Registers
  3 KB (456 words) - 21:08, 2 July 2023
• KB11-C CPU
  [[Category: PDP-11 UNIBUS Processors]]
  2 KB (260 words) - 21:03, 24 October 2022
• BC11A UNIBUS cable
  ...ipheral|devices]] such as the [[RP11 disk controller]]). It carries all 56 UNIBUS [[signal]]s, and 64 [[ground]] lines (alternating with the signals, to prev ...t board|PCB]] ([[M919]] and [[M929]]), which plug into the 'UNIBUS in' or 'UNIBUS out' slot of the element's [[backplane]].
  1 KB (176 words) - 12:47, 16 October 2021
• FPF11 floating point processor
  ...[[Central Processing Unit|CPU]] board. It can be plugged into either a [[UNIBUS]] or [[QBUS]] backpane, since it does not use the [[bus]]; it only gets pow [[Category: PDP-11 Processors]]
  2 KB (383 words) - 02:31, 12 October 2022
• RS64 disk drive
  | controller = [[RC11 disk controller|RC11]] ([[UNIBUS]]) ...[[PDP-11]]s. (No [[PDP-8 family|PDP-8]] or other [[List of Programmed Data Processors|early DEC system]] [[device controller]] has yet been seen for it, although
  2 KB (258 words) - 22:12, 14 August 2023
• KD11-D CPU
  It plugs into a modified [[Modified UNIBUS Device|MUD]] [[backplane]], either the the [[DD11-C backplane|DD11-C]] or [ ...bove) of the M7263. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)
  2 KB (385 words) - 22:37, 31 March 2022
• KT11-D Memory Management Unit
  [[Category: PDP-11 UNIBUS Processors]]
  2 KB (258 words) - 00:29, 30 December 2023
• KD11-K CPU
  ...[[PDP-11 Memory Management|subset PDP-11 memory management]], and used a [[UNIBUS]] for its [[main memory]] access (although a built-in [[cache]] was standar ...e memory UNIBUS; but it also indicates (pg. 3) that there is only a single UNIBUS. (Perhaps all the [[bus grant line]]s from the bus arbitration circuitry in
  4 KB (536 words) - 12:34, 11 October 2022
• FP11-E Floating Point Processor
  [[Category: PDP-11 UNIBUS Processors]]
  1 KB (229 words) - 02:19, 13 October 2022
• Bus Arbitration on the Unibus and QBUS
  '''On Bus Arbitration on the Unibus and QBUS''' ...ry from years ago of being told about how there was a design flaw in the [[UNIBUS]] that could, on rare occasion, lead to a bus-arbitration failure, and that
  21 KB (3,685 words) - 04:35, 28 November 2023
• KJ11-A Stack Limit Register
  [[Category: PDP-11 UNIBUS Processors]]
  995 bytes (154 words) - 02:35, 12 October 2022
• KK11-B Cache Memory
  ...ytes; also a tag field for cache entries, 9 bits wide (covering [[Extended UNIBUS]] address bits 21-13); 3 [[parity]] bits (one for the tag); and two valid b ...IBUS]] was cached, not any memory which might be present on the ordinary [[UNIBUS]] (normally used only for [[input/output|I/O]]).
  3 KB (501 words) - 16:27, 6 February 2024
• KY11-L to CPU interface
  ...console to request that the CPU [[halt]]; this is done with the standard [[UNIBUS]] [[signal]], SACK, and a pair of additional signals, Halt Request and Gran ...[[grant continuity card]]), the machine will irretrievably 'freeze'; see [[UNIBUS and QBUS termination#SACK turnaround and CPU hangs|SACK turnaround and CPU
  4 KB (650 words) - 16:50, 4 December 2022

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