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• Seagate ST1144A
  Seagate's 800 number allows toll-free access to automated self-help CompuServe. To access our technical support forum, type go seagate.
  25 KB (3,017 words) - 18:47, 13 January 2024
• Installing Windows NT 3.1 on Qemu-legacy
  With MS-DOS installed and able to access a CD-ROM, you will need a blank floppy image, in addition to either an ISO If you have access to Visual C++ 1.0 32bit you'll be in luck as you can rebuild a few things.
  6 KB (997 words) - 11:22, 9 June 2023
• Clipper Summer 1987
  ...of shipping [[database]] [[application]]s prior to the rise of [[Microsoft Access]]. Clipper applications ran under [[MS-DOS]]. As time went by there were e
  566 bytes (85 words) - 18:37, 18 December 2018
• RP07 Disk Drive
  RP07: 516 MB HD, 1300 KB/s, 31.3 average access, 23 ms average seek, 5 ms track-to-track seek time, 3633 rpm
  787 bytes (114 words) - 03:21, 11 November 2023
• RM02/03 disk drive
  | average access time = 42.5 msec (RM02)<br>38.3 msec (RM03)
  4 KB (533 words) - 17:08, 15 August 2023
• RM05 Disk Drive
  ...6 MB [[MASSBUS]] [[removable-pack disk]] drive, 1200 KB/s, 31.3 ms average access time, 23 ms average seek time, 6 ms track-to-track seek, 3600 RPM. It was [
  1 KB (177 words) - 18:09, 15 August 2023
• RP06 disk drive
  | average access time = 38.3 msec ...rives were supported per controller; drives could be dual-ported, to allow access from two different controllers.
  2 KB (297 words) - 00:39, 15 August 2023
• RA60 Disk Drive
  | average access time = 50.3 msec
  4 KB (524 words) - 10:36, 31 August 2023
• RA70 disk drive
  | average access time = 27 msec
  2 KB (280 words) - 10:35, 31 August 2023
• RA80 Disk Drive
  | average access time = 33 msec It had two heads per surface; not rotationally opposed (to halve maximum access time), but two on each arm; there thus 1,092 usable tracks on each surface.
  2 KB (332 words) - 03:16, 31 August 2023
• RM80 Disk Drive
  | average access time = 33.3 msec It had two heads per surface; not rotationally opposed (to halve maximum access time), but two on each arm; there were thus 1,122 usable tracks on each dat
  3 KB (355 words) - 16:23, 18 August 2023
• RA82 disk drive
  | average access time = 32.3 msec It had two heads per surface; not rotationally opposed (to halve maximum access time), but two on each arm; there thus 2,846 usable tracks on each data sur
  2 KB (306 words) - 03:12, 31 August 2023
• RD54
  random access storage devices utilizing nonremovable 5 -inch disks as storage media. Each disk surface employs one movable head to access
  19 KB (2,351 words) - 03:47, 19 May 2024
• RX50 dual-diskette drive
  | average access time = 164 msec
  2 KB (284 words) - 14:45, 15 September 2023
• TU58 DECtape II
  Average access time using [[random access]] was 9.3 seconds; maximum was 28. Data was verified by a [[checksum]] on e
  3 KB (373 words) - 03:13, 23 August 2022
• DECtape II
  '''DECtape II''' was a low-cost, low-performance [[random access]] [[magnetic tape]] [[secondary storage]] system, proprietary to [[Digital
  1 KB (166 words) - 16:04, 30 May 2022
• TU81 Streaming Tape Unit
  ...ssor, a variant of the [[MC6800|6800]] with 128 bytes of internal [[Random Access Memory|RAM]] and an internal clock oscillator. There was also a [[6821 PIA|
  3 KB (409 words) - 20:32, 23 April 2024
• TPA-11/580
  ...pment team didn't have a machine to examine, they used what they could get access to, so the process took rather long time.
  4 KB (587 words) - 00:38, 2 January 2024
• UNIX V6 memory layout
  ...ter which process is running. The other special segment is set up to allow access to the [[UNIBUS]]'s so-called 'I/O Page', which holds [[peripheral]] and [[ ...swappable per-process data of each process, and the 8th is set up to allow access to the UNIBUS 'I/O Page'.
  7 KB (1,161 words) - 15:20, 8 July 2023
• Setting up (BSD 4.0) the Fourth Berkeley Software Tape
  the system namelist for quicker access. taken to change the access modes (chmod(8)) on these files
  57 KB (8,582 words) - 03:00, 17 January 2023
• Bug fixes and changes in 4.1bsd
  ports concurrent read and write access to files (see mt Is a new command which provides easy access to
  39 KB (5,307 words) - 05:01, 11 December 2018
• INTEL 80386 PROGRAMMER'S REFERENCE MANUAL
  6.3.2 Restricting Access to Data 3-17 Variable Access in Nested Procedures
  890 KB (107,817 words) - 03:20, 3 January 2024
• IBM OS2 1.0 announcement
  o 16MB Addressable Random Access Memory Support 16MB Addressable Random Access Memory Support
  50 KB (7,113 words) - 03:35, 17 December 2018
• Inside OS/2
  2.1.7 Direct Device Access 8.2 Network Access
  627 KB (92,395 words) - 03:42, 17 December 2018
• Suspended (game)
  ...ms, including the ones that are in the section that requires the wedge for access.
  5 KB (765 words) - 19:00, 26 December 2016
• Installing Ultrix 4.5 on SIMH
  ==Enabling outside access== To enable root access for all telnet sessions, you will have to edit the /etc/ttys file and chang
  44 KB (6,192 words) - 09:30, 29 September 2023
• LSI-11
  ...KD11-F version includes 4KW of [[Metal Oxide Semiconductor|MOS]] [[Random Access Memory|RAM]] on-board; the KD11-H version has the RAM deleted.
  3 KB (411 words) - 22:06, 20 December 2023
• KUV11 Writeable Control Store
  ...ead-only memory|ROM]] [[chip socket]] on the CPU card, and gives the KUV11 access to the micro-instruction [[bus]]. ...able, but has read-write access to it via the QBUS. That bus also provides access to a number of control [[register]]s on the KUV11.
  2 KB (337 words) - 21:12, 2 July 2023
• QBUS memories
  * [[MSV11-L MOS Random-Access Memory‎|MSV11-L]] - (M8059) * [[MSV11-P MOS Random-Access Memory‎|MSV11-P]] - (M8067)
  5 KB (835 words) - 02:21, 20 September 2022
• Md5.c
  ** -- Access pattern: round 2 works mod 5, round 3 works mod 3 **
  19 KB (2,156 words) - 04:05, 17 December 2018
• Installing 4.1c BSD on SIMH
  ...uploaded a copy onto this wiki in uuencoded format. To decode it, simply access the [[boot42|article]], and copy the contents of the quoted text (the begin
  13 KB (2,077 words) - 16:30, 7 August 2017
• UNIX* System V and 4.1C BSD
  6.1.2 Faster access........................ 27 permits access to the O_NDELAY (non-blocking I/O)
  113 KB (13,419 words) - 02:06, 17 December 2018
• MM11-L core memory
  ...s the components for the two parity bits.) Enabling parity increased the [[access time]] from 400 nsec to 525 nsec.
  5 KB (841 words) - 07:14, 25 March 2022
• RK02/03 disk drive
  | average access time = 70 msec
  2 KB (259 words) - 00:29, 15 August 2023
• Modified UNIBUS Device
  ...e C-F connectors (needed for signals for [[interrupt]]s or [[Direct Memory Access|DMA]], for devices which did those), with most UNIBUS signals present in bo
  4 KB (708 words) - 16:06, 30 March 2023
• KL10
  ...tachment of [[main memory]] units, while the C Bus allowed [[Direct Memory Access|DMA]] accesss to main memory.
  11 KB (1,737 words) - 13:06, 2 April 2024
• SS-50 bus
  ...ats the address and data buses and the R/W line. External devices can then access memory for DMA, for example
  6 KB (1,084 words) - 16:55, 16 February 2024
• KDJ11-B CPU
  ...ts of tag fields for each cache entry, so that the CPU and [[Direct Memory Access|DMA]] from the QBUS can interact with the cache simultaneously. Cache contr
  2 KB (391 words) - 16:40, 6 February 2024
• KTJ11-B UNIBUS adapter
  As a further feature, on most UNIBUS backplanes, the 'NPG' ([[Direct Memory Access|DMA]] grant line) signal is carried across unused slots by wire jumpers on
  6 KB (1,060 words) - 16:35, 6 February 2024
• Private Memory Interconnect
  ...a KTJ11-B, it provides means for UNIBUS devices to perform [[Direct Memory Access|DMA]] cycles (mapped to the full 22-bit address space via a [[UNIBUS map]]) | CD1 || PUBMEM || CPU access to UNIBUS
  4 KB (731 words) - 17:11, 6 February 2024
• KT11-B Paging Option
  Individual pages may be marked 'Private', which means that only access from code running in Private pages is allowed; i.e. information in such pag ...p page has to contain 16 entries (8 Kbytes at 512 bytes per page) to allow access to the device registers (if they are to appear in the same place in the add
  15 KB (2,571 words) - 22:23, 11 October 2022
• PDP-11 Memory Management
  ...PDR contains the segment's length, along with the direction of growth, the access control field (read/only, read/write, etc), a 'dirty' bit (maintained by th ...th || Trapped || Written || colspan=2 | Unused || Direction || colspan=3 | Access Control
  9 KB (1,311 words) - 18:10, 2 July 2023
• UNIBUS map
  ...'UNIBUS map''' to allow [[Direct Memory Access|DMA]] devices on the UNIBUS access to all of main memory.
  2 KB (310 words) - 04:15, 7 January 2021
• Virtual memory
  ...ory, to perform the relocation function. The pager sometimes needed direct access to the internals of the CPU, to properly perform the demand loading functio
  5 KB (876 words) - 20:01, 22 January 2024
• KA11 CPU
  ...ecture#Addressing modes|operand modes]] other than mode 0, direct register access (for which, as previously mentioned, the Source or Destination major state
  9 KB (1,356 words) - 23:10, 29 February 2024
• KT11-B Technical Manual
  ...1-B does not contain any internal registers to which the CPU does not have access, the term 'register' hereinafter refers to any of the registers in the KT11 * ENB SPOR(3) (6-1): Select scratchpad register for UNIBUS access
  31 KB (4,983 words) - 18:22, 2 July 2023
• RX01/02 floppy drive
  | average access time = 262 ms The average access time of 262 ms is computed as follows:
  8 KB (1,195 words) - 20:09, 15 August 2023
• DMA
  #Redirect [[Direct Memory Access]]
  34 bytes (4 words) - 02:37, 7 November 2016
• Direct Memory Access
  '''Direct Memory Access''', usually abbreviated as '''DMA''', refers to a now-very-common technique ...e. In the second, the memory has multiple ports, and the device has direct access to the memory via one of the ports.
  751 bytes (125 words) - 23:08, 20 October 2021
• MASSBUS
  The control section is used to allow the [[Central Processing Unit|CPU]] access to device registers implemented in the devices. The data section is 18 (opt
  5 KB (729 words) - 21:36, 2 December 2023
• RK11-C disk controller
  ...er-run errors when there was considerable competing UNIBUS [[Direct Memory Access|DMA]] traffic.
  9 KB (1,351 words) - 14:44, 26 March 2023
• LINC tape
  LINC tape was random access, so the drive had the ability to move forward and backwards to the desired * Severo M. Ornstein, [https://archive.computerhistory.org/resources/access/text/2019/03/102785079-05-01-acc.pdf ''Computing in the Middle Ages: A View
  3 KB (519 words) - 02:13, 28 February 2024
• LINC-8
  ...access to the PDP-8's [[main memory]] (the LINC acted as a [[Direct Memory Access|DMA]] peripheral to the PDP-8, using the PDP-8 [[data break]] mechanism). A ...code running in the LINC access to PDP-8 resources; the PDP-8 likewise had access to the resources of the LINC (e.g. the display). When the PDP-8 was in cont
  2 KB (328 words) - 13:46, 11 July 2023
• DECtape
  DECtape was [[random access]], so the [[magnetic tape drive|drive]] had the ability to move forward and
  5 KB (736 words) - 14:21, 30 May 2022
• Core memory
  ...nd [[drum]]scould have slow [[access time]]s, since they were not [[random access]]). ...solved all these problems. It was reliable, relatively cheap, fast, random access, and compact (by the standards of the day) - everything that one could want
  8 KB (1,299 words) - 02:33, 4 March 2024
• Main memory
  Main memory is also used to store data for immediate access by the CPU. Computers which keep instructions and data in the same memory a
  2 KB (250 words) - 17:10, 11 September 2019
• RAM
  #REDIRECT [[Random Access Memory]]
  34 bytes (4 words) - 05:21, 12 November 2016
• Random access memory
  #Redirect [[Random Access Memory]]
  34 bytes (4 words) - 05:21, 12 November 2016
• MK11 memory system
  ==CSR Access== ...them. That is to use the [[UNIBUS map]] (usually used for [[Direct Memory Access|DMA]] cycles from [[peripheral|device]]s to main memory); the [[memory mana
  8 KB (1,276 words) - 03:23, 6 February 2024
• Microcode
  ...was a [[diode]] matrix), some later computers included high-speed [[Random Access Memory|RAM]] for part of the control store, so that the instruction set cou
  6 KB (853 words) - 14:25, 22 January 2024
• BSD Fast File System
  ...e 'super block'. So a particular FFS partition might be optimized for fast access, or for minimum wasted space.
  11 KB (1,759 words) - 19:20, 12 June 2023
• MB20 core memory
  ...mum of 512KW; [[parity]] is provided to protect the memory contents. The [[access time]] is 1.04 µseconds, and the [[cycle time]] is 1.92 µseconds (both fo
  2 KB (256 words) - 04:17, 1 August 2023
• DH11 asynchronous serial line interface
  ...ovides up to 16 [[asynchronous serial line]]s. Output used [[Direct Memory Access|DMA]] (with each line having its own [[buffer]] [[pointer]] and count); on
  10 KB (1,443 words) - 02:27, 19 February 2023
• Non-Processor Request and Grant
  ...trol of the UNIBUS's data section so that it may perform a [[Direct Memory Access|DMA]] cycle.
  1 KB (212 words) - 18:50, 6 July 2022
• DR11 parallel interface
  ...s of [[parallel interface]]s for the [[UNIBUS]]. Some used [[Direct Memory Access|DMA]], others were [[programmed I/O]]. * [[DR11-W Direct Memory Access Interface|DR11-W]]: hex single-board replacement for the DR11-B
  1 KB (156 words) - 23:02, 14 December 2021
• Programmed I/O
  ...ction]]s performed by the CPU to move data - as opposed to [[Direct Memory Access|DMA]], in which the [[peripheral|device]] communicates directly with [[main * [[Direct Memory Access]]
  1 KB (192 words) - 23:12, 20 October 2021
• DR11-B parallel interface
  ...[[parallel interface]] for the [[UNIBUS]], one which used [[Direct Memory Access|DMA]] to transfer data to a user device.
  5 KB (766 words) - 03:15, 25 November 2022
• Cache
  ...artial copy of a larger collection of data, implemented in such a way that access to the data copy in the cache is faster than to that in the large, full sto
  1 KB (251 words) - 00:58, 17 May 2023
• MM11-D core memory
  ...ing|interleave]] a pair of MM11-D's to provide reduced effective average [[access time]]s.
  2 KB (376 words) - 19:54, 30 July 2023
• Bus grant
  ...o that the device can either start an [[interrupt]], or do [[Direct Memory Access|DMA]] transfer(s) to [[main memory]].
  1 KB (194 words) - 18:42, 11 November 2019
• Bus grant line
  ...ce controller]]s that their request for [[interrupt]]s and [[Direct Memory Access|DMA]] have been [[bus grant|granted]] (hence the name).
  2 KB (281 words) - 01:01, 14 February 2023
• NORD-TSS
  * Has a general purpose [[file system]] with various types of access and protection modes * Has a Monitor Call System to provide user access to input / output functions, string functions, formatting routines and file
  1 KB (181 words) - 15:15, 9 September 2022
• NORDIC
  * two NCR Dual Disc units with capacity of 8 million 16 bit word, average access time 45 ms * one Vermont drum, capacity 256K 16 bit words, access time 10 ms average
  2 KB (244 words) - 15:14, 9 September 2022
• UNIX file system
  ...), the owner of the file, the file's protection, and last modification and access times, etc.
  7 KB (1,147 words) - 14:34, 14 June 2023
• FPJ11 floating point accelerator
  ...AB. DEC had a number of problems with 'corner cases' (e.g. [[Direct Memory Access|DMA]] during certain floating point instructions), and had to issue revised
  2 KB (276 words) - 21:06, 2 July 2023
• Address Resolution Protocol
  With the advent of the 10 Mbit/second Ethernet, which had 48-bit [[Media Access Control Address|physical addresses]] (so that all Ethernet [[network interf
  1 KB (207 words) - 18:14, 12 December 2023
• Ethernet
  The 48-bit physical address of the DIX Ethernet is known as the [[Media Access Control Address]] (short form: 'MAC Address' or just: 'MAC'), sometimes 'Et Originally, Ethernet was a [[Carrier-Sense Multiple Access with Collision Detection]] (CSMA-CD) [[bus]] (i.e. a shared [[broadcast]] c
  8 KB (1,199 words) - 22:00, 5 October 2023
• Register
  ...]]s usually include registers too. For the ones which are part of the CPU, access to them is very fast - usually faster than main memory.
  1 KB (173 words) - 13:10, 14 May 2021
• Single-level store
  ...h, information may be in [[main memory|primary storage]] (usually [[Random Access Memory|RAM]]) or in [[secondary storage]] (usually [[disk]]), and the [[ope
  3 KB (536 words) - 02:10, 16 December 2018
• Honeywell 6000 series
  ...[[multi-processor]], with all the [[Central Processing Unit|CPUs]] sharing access to a collection of [[multi-port memory]] units. All used 36-bit [[word]]s,
  12 KB (1,837 words) - 19:24, 3 January 2024
• Drum
  ...sters in each track, and using multiple heads on that track to give faster access to the contents of the registers.
  2 KB (257 words) - 20:45, 18 March 2024
• File
  ...ke an effort to keep the blocks of a file in close physical proximity, for access speed reasons.)
  906 bytes (151 words) - 23:06, 16 December 2018
• RP04 disk drive
  | average access time = 36.3 msec
  2 KB (284 words) - 19:38, 23 December 2023
• RP03 disk drive
  | average access time = 41.5 msec
  2 KB (233 words) - 20:45, 10 February 2024
• RH11 MASSBUS controller
  ...rds.) The RH11 can be set under [[software]] control to do [[Direct Memory Access|DMA]] data transfers on either the first or second UNIBUS (UNIBUS 'B'). ...UNIBI together. (E.g. in the 'disk' RH11 in the KS10, where the CPU needs access to the device registers, interrupts, etc, which are on UNIBUS 'A', but also
  6 KB (951 words) - 15:40, 25 February 2022
• KS10
  ...upports [[interrupt]]s from the UNIBUS adapters, as well as [[diagnostic]] access from the mandatory 'console' subsystem, which is interfaced to the KS10 bus ...e UNIBUS [[address space]] into the KS10's main memory for [[Direct Memory Access|DMA]] operations.
  8 KB (1,237 words) - 19:48, 14 July 2023
• Condition handler
  ...ntage that if a handler is inside a procedure, the handler can easily have access to that procedure's [[automatic variable]]s. (It is hard to do both of thes
  5 KB (795 words) - 13:10, 10 March 2023
• PDP-15
  ...er PDP-11-native peripherals could be supported, including [[Direct Memory Access|DMA]] directly into the PDP-15's memory through the [[MX15-B Memory Multipl
  4 KB (591 words) - 13:40, 11 July 2023
• RP02 disk drive
  | average access time = 62.5 msec
  2 KB (299 words) - 20:41, 10 February 2024
• RH70 MASSBUS controller
  ...es from the device), as well as to the [[UNIBUS]] (for [[interrupt]]s, and access to the device's [[register]]s by the [[Central Processing Unit|CPU]]). ...eads and writes go directly to the actual main memory (although the RH70's access to the main memory bus is controlled by the cache). A write to a main memor
  2 KB (318 words) - 15:45, 25 February 2022
• BA11-C Mounting Box
  ...e backplane wiring for [[debug]]ging. The unit could rotate to give easier access to the boards.
  2 KB (307 words) - 03:11, 11 July 2023
• FP11-A Floating-Point Processor
  ...nect to the M8267 card. (This is all necessitated because the FP11-A needs access to signals carried over the maintenance cables.) ...M8267 card is normally placed on a hex [[extender card]] to allow physical access to internal signals, a special W9042 Extender Board exists, to be used in p
  4 KB (734 words) - 02:17, 13 October 2022
• PDP-9
  ...cess]] Channel Multiplexor Adapter provided high-speed devices with direct access to main memory for data transfers.
  6 KB (801 words) - 22:14, 9 February 2024
• Compatible Time-Sharing System
  CTSS provided access to users on terminals connected to [[asynchronous serial line]]s, both loca
  6 KB (1,011 words) - 16:53, 7 March 2024
• Semiconductor
  ...l [[main memory]] was [[core memory]], so the term 'semiconductor [[Random Access Memory|RAM]]' was used to indicate the use of ICs to actually hold data.
  2 KB (279 words) - 00:36, 11 January 2024
• Modem
  ...er [[telephone]] lines were the most common. With the rise of [[Internet]] access over [[cable TV]], cable TV modems became common.
  547 bytes (86 words) - 20:55, 13 December 2018
• UNICHANNEL 15 System
  ...PDP-15's [[Central Processing Unit|CPU]], but also to allow PDP-15 systems access to devices which did not have native PDP-15 support, such as the [[RK05 dis ...CPU, and [[Direct Memory Access|DMA]] devices on the PDP-11's [[UNIBUS]]) access to the PDP-15's [[main memory]].
  1 KB (180 words) - 14:48, 28 November 2022
• MX15-B Memory Multiplexer
  ...15 [[main memory]] attached to the MX15-B, and also allowed the PDP-15 CPU access to both the PDP-11's memory, and that PDP-15 memory - i.e. it turned both m
  2 KB (314 words) - 00:35, 1 December 2022
• Chaosnet
  The LAN was a [[Carrier-Sense Multiple Access with Collision Detection|CSMA-CD]] system modeled on the [[Xerox PARC]] 3 m ...to provide [[mapping]]s from 16-[[bit]] Chaos [[address]]es to the [[Media Access Control Address‎|48-bit addresses]] used by Ethernet.)
  8 KB (1,211 words) - 16:55, 10 April 2024
• ARPANET
  ...hich could be attached [[terminal]]s, which allowed users at the terminals access to the hosts attached to the ARPANET.
  4 KB (659 words) - 15:40, 17 March 2024

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