Difference between revisions of "VAX-11/730"

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m (External links: sub VAX-11/730 Hardware User's Guide)
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* [http://www.bitsavers.org/pdf/dec/vax/handbook/VAX_Hardware_Handbook_Volume_1_1986.pdf VAX Hardware Handbook Volume 1] - the VAX-11/730 is covered in Chapter 3 (pp. 132-152 of the PDF)
 
* [http://www.bitsavers.org/pdf/dec/vax/handbook/VAX_Hardware_Handbook_Volume_1_1986.pdf VAX Hardware Handbook Volume 1] - the VAX-11/730 is covered in Chapter 3 (pp. 132-152 of the PDF)
 
* [http://www.bitsavers.org/pdf/dec/vax/730/ VAX/730] - documentation at Bitsavers
 
* [http://www.bitsavers.org/pdf/dec/vax/730/ VAX/730] - documentation at Bitsavers
** [http://www.bitsavers.org/pdf/dec/vax/730/EK-1173-UG-003_VAX_11_730_Hardware_Users_Guide_198312.pdf VAX-11/730 Hardware User's Guide (EK-1173-UG-003)
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** [http://www.bitsavers.org/pdf/dec/vax/730/EK-1173-UG-003_VAX_11_730_Hardware_Users_Guide_198312.pdf VAX-11/730 Hardware User's Guide] (EK-1173-UG-003)
 
** [http://www.bitsavers.org/pdf/dec/vax/730/MP01270_11-730_Engineering_Drawings_198204.pdf 11/730-Z Field Maintenance Print Set] (MP01270)
 
** [http://www.bitsavers.org/pdf/dec/vax/730/MP01270_11-730_Engineering_Drawings_198204.pdf 11/730-Z Field Maintenance Print Set] (MP01270)
  
 
{{Nav VAX}}
 
{{Nav VAX}}

Revision as of 00:58, 6 July 2022


VAX-11/730
Summary
Announcement date: April 1982
Codename: Nebula
OS support (VMS): VMS V3.0
CPU Details
CPU module: KA730
Number of processors: 1
CPU technology: Bipolar Schottky
CPU cycle time: 270ns [1]
Instruction-buffer: 4 bytes [1]
Translation-buffer: 128 entries [1]
Writable Control Store: 16K 24-bit words [1]
Compatibility mode: Yes [1]
Console processor: 8085A [1]
Console device: TU58
Memory
Minimum memory: 1MB [1]
Maximum memory: 5MB
Physical address lines: 24 [1]
Memory checking: 7-bit ECC/longword [1]
Memory cycle: 810ns [1]
I/O
UNIBUS: 1 @ 1.5MB/s [1]
LAN support: optional
Performance
VUPs: 0.3


The VAX-11/730 was the third VAX introduced, and the slowest implementation of the VAX architecture to have been made. By way of extensive microcoding of the large architecture, the CPU was shrunk to three hex boards. The machine seems to have been most popular for application development projects for the VAX - where the architecture was needed, but not necessarily performance.

It was also sold as VAX-11/725, which was a smaller-size packaging of the same machine.

It uses the UNIBUS for one of its input/output buses; the 'Port Bus', used for data transfer, is the other. The only device on the Port Bus is the RB730 Integrated Disk Controller, which also connects to the UNIBUS for interrupts (it plugs into a dedicated, custom backplane slot). The main memory uses the same internal memory bus as the MS750 Memory System (and thus the same memory array modules, 1-5 of them).

The boards are all mounted in a BA11-Z mounting Box, which holds a custom 12-slot backplane (DEC part number 70-18080-0-1). The front panel functionality is performed by an 8085A microprocessor, which uses a TU58 magnetic tape drive for mass storage.

See also

References

[1] VAX Hardware Handbook Volume 1 - 1986.
[2] Systems & Options Catalog. European Edition. Spring 1990.

External links