Difference between revisions of "VAX 9000 series"

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The '''VAX 9000''' was a high-performance [[ECL]]-based [[VAX]].
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The '''VAX 9000''' was a high-performance [[Emitter-coupled logic|ECL]]-based [[VAX]].
  
 
==Hardware==
 
==Hardware==
  
The CPU was built out of MCUs, or Multi-Chip Units.
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The [[Central Processing Unit|CPU]] was built out of MCUs, or Multi-Chip Units.
  
Each CPU was implemented with 13 Multi-Chip Units (MCUs), with each MCU containing several emitter-coupled logic (ECL) macrocell arrays which contained the CPU logic. The gate arrays were fabricated in Motorola's "MOSAIC III" process, a bipolar process with a drawn width of 1.75 micrometres and three layers of interconnect. The MCUs were installed into a CPU planar module, which accommodated 16 MCUs and was 24 by 24 inches (610 mm) in size.  
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Each CPU was implemented with 13 Multi-Chip Units (MCUs), with each MCU containing several emitter-coupled logic (ECL) macrocell arrays which contained the CPU logic. The [[gate array]]s were fabricated in Motorola's "MOSAIC III" process, a [[bipolar]] process with a drawn width of 1.75 micrometres and three layers of interconnect. The MCUs were installed into a CPU planar module, which accommodated 16 MCUs and was 24 by 24 inches (610 mm) in size.  
  
 
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Revision as of 14:50, 22 June 2022

The VAX 9000 was a high-performance ECL-based VAX.

Hardware

The CPU was built out of MCUs, or Multi-Chip Units.

Each CPU was implemented with 13 Multi-Chip Units (MCUs), with each MCU containing several emitter-coupled logic (ECL) macrocell arrays which contained the CPU logic. The gate arrays were fabricated in Motorola's "MOSAIC III" process, a bipolar process with a drawn width of 1.75 micrometres and three layers of interconnect. The MCUs were installed into a CPU planar module, which accommodated 16 MCUs and was 24 by 24 inches (610 mm) in size.