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  • VAX
    ...eXtension') for a family of computers from [[Digital Equipment Corporation|DEC]]. They were the successors to the [[PDP-11]] series of [[minicomputer]]s. * [[:Category:DEC VAX systems|DEC VAX systems]]
    3 KB (388 words) - 16:50, 22 April 2024
  • QBUS
    ...the [[UNIBUS]] general system [[bus]] from [[Digital Equipment Corporation|DEC]]. It was widely used in later [[PDP-11]]s and smaller [[VAX]]en. ...and address lines 0 through 12 to recognize their address(es). (Some QBUS CPUs do not even drive the high address lines during references to the I/O page.
    13 KB (2,043 words) - 23:27, 14 January 2024
  • PDP-11/34
    The '''PDP-11/34''' was [[Digital Equipment Corporation|DEC]]'s lower-cost replacement to the [[PDP-11/40]] as the low-end [[PDP-11]] s ...UNIBUS and QBUS termination|termination and pull-ups]] (unusual for PDP-11 CPUs); this is almost certainly the reason that the manual calls for the use of
    4 KB (536 words) - 19:28, 8 February 2024
  • PDP-11/45
    | manufacturer = [[Digital Equipment Corporation|DEC]] ...or [[KB11-D CPU]] (later units) high-performance [[Central Processing Unit|CPUs]], implemented in [[SSI]] [[Schottky TTL]] logic.
    6 KB (895 words) - 23:52, 29 February 2024
  • PDP-11 architecture
    ...f 16-[[bit]] [[minicomputer]]s designed by [[Digital Equipment Corporation|DEC]], in production from 1970-1990. Although the basic [[address space]] was 1 ...P-11/34]], [[PDP-11/44]] and [[PDP-11/23]]; it was standard in the [[KDJ11 CPUs]] (although in these machines an optional [[FPJ11 floating point accelerato
    13 KB (1,949 words) - 17:37, 29 February 2024
  • VAX-11/782
    ...cessor]] [[VAX]]; it had two [[KA780 CPU|KA780]] [[Central Processing Unit|CPUs]] connected to up to four [[MA780 Multiport Memory Option|MA780]] [[multi-p * [http://www.bitsavers.org/pdf/dec/vax/handbook/VAX_Hardware_Handbook_Volume_1_1986.pdf VAX Hardware Handbook
    3 KB (420 words) - 09:14, 15 July 2023
  • VMS
    ...and [[Windows]], VMS Software, Inc. (which is the current owner of most of DEC's assets) has a hobbyist program which allows licenses to be obtained for n ...vms-hw.html VAX/VMS Versions] - "which VMS versions are supported on which CPUs"
    2 KB (335 words) - 10:03, 27 April 2024
  • KD11
    ...[[Digital Equipment Corporation|DEC]] [[PDP-11]] [[Central Processing Unit|CPUs]]:
    658 bytes (116 words) - 02:18, 24 February 2019
  • MicroVAX I
    ...st of a number of [[MicroVAX]] models from [[Digital Equipment Corporation|DEC]]. It used the [[QBUS]] as its primary [[bus]] between the [[Central Proces Last interactive login on Saturday, 3-DEC-2022 17:59
    10 KB (1,525 words) - 21:20, 10 January 2024
  • PDP-10
    ...word]] [[mainframe]]-like systems built by [[Digital Equipment Corporation|DEC]]. They were basically a re-implementation of the earlier [[PDP-6]] [[instr ...ailable in [[multi-processor]] versions with two [[Central Processing Unit|CPUs]].
    11 KB (1,640 words) - 20:59, 8 March 2024
  • Bus
    Some time after this, some computers began to share memory between several CPUs. On these computers, access to the bus had to be prioritized, as well. [[Digital Equipment Corporation|DEC]] noted that having two buses seemed wasteful and expensive for small, mass
    14 KB (2,170 words) - 05:09, 5 September 2019
  • VAX-11/785
    ...upgraded version of the [[VAX-11/780|/780]]; its [[Central Processing Unit|CPUs]] used [[Advanced Schottky]] [[logic]]. A /780 could be upgraded to a /785 * [http://www.bitsavers.org/pdf/dec/vax/785/ 785] - documentation on [[BitSavers]]
    2 KB (193 words) - 04:26, 13 January 2024
  • FLIP CHIP
    ...to build computers, and [[peripheral]]s for them. They were a successor to DEC's earlier [[System Module]]s. They were introduced as a replacement largely ...(the so-called 'solder' side); the contact pads were 'numbered' from the [[DEC Alphabet]]. A FLIP CHIP plugged directly into a 144-pin connector block [[b
    10 KB (1,460 words) - 15:50, 6 March 2024
  • VAX 9000 series
    ...ightly-coupled [[multi-processor]]s with up to 4 [[Central Processing Unit|CPUs]]. [[Main memory]] was also connected to the SCU. The CPUs were heavily [[pipeline]]d, and were built from [[emitter-coupled logic|ECL
    3 KB (415 words) - 01:26, 2 January 2024
  • DEC indicator panel
    ...nal state of the machine, were provided by [[Digital Equipment Corporation|DEC]] for their earlier computers (such as the [[KA10]]), in common with the ot ...]], although the PDP-11 CPU light displays were modest compared to earlier CPUs. The earliest PDP-11 disk controllers were very much a match for the earlie
    4 KB (612 words) - 20:33, 5 January 2024
  • Qemu
    Qemu can emulate numerious CPUs and machine types. Most are geared towards running [[Linux]], the x86/x64 *[[DEC Alpha]] (really incomplete)
    15 KB (2,245 words) - 12:58, 27 February 2024
  • Windows NT
    | architecture = Originally [[MIPS]], then [[i386]], [[DEC Alpha]], [[PowerPC]], [[Itanium]], [[x64]] ...rsion of OS/2 that would be portable, and was targeted for the coming RISC CPUs. The goal was to design a micro kernel OS that could run 32 bit POSIX bina
    15 KB (2,465 words) - 20:47, 13 January 2024
  • J-11 chip set
    ...]] implementation of the [[PDP-11 architecture]], used in both the [[KDJ11 CPUs]], and a variety of peripherals. It was implemented in two [[integrated cir Most uses on DEC PDP-11 [[Central Processing Unit|CPU]] boards (all for the [[QBUS]]) contai
    2 KB (242 words) - 23:19, 29 February 2024
  • KDF11-A CPU
    ...the M8186. It uses the same 'Fonz' [[F-11 chip set]] as the other [[KDF11 CPUs]]. * [http://www.bitsavers.org/pdf/dec/pdp11/1123/EK-KDF11-UG-PR2_Mar79.pdf KDF11-AA User's Guide] (EK-KDF11-UG-PR
    3 KB (424 words) - 02:05, 10 July 2023
  • M782 Interrupt Control
    ...versions '''M7820''' and '''M7821''') is a [[Digital Equipment Corporation|DEC]] [[FLIP CHIP]] which implements the '[[interrupt]] control' function for t ...re was an un-lettered initial version, but that does not seem to have been DEC practise at the time), although examples of the C and D are not extant (it
    5 KB (820 words) - 04:04, 28 November 2023
  • Computer Emulation Framework
    Inherent in the CEF specification for CPUs is optional support for profiling, breakpoints/watchpoints, assembly and di The available CPU components are DEC PDP-11 (up to 11/34), Intel 8008, Intel 8080/8085, Zilog Z80, RCA CDP1802/1
    4 KB (620 words) - 21:10, 14 January 2024
  • NetBSD 0.9 announcement
    cpus for which there is a cpu declaration (see kernel Modified the SCSI disk startup so that DEC disks (for example)
    29 KB (4,794 words) - 18:15, 16 December 2018
  • KDF11-B CPU
    ...F11-BA M8189, using the same 'Fonz' [[F-11 chip set]] as the other [[KDF11 CPUs]]. ...tor]] headers on the top edge of the card, using the standard 10-[[pin]] [[DEC asynchronous serial line pinout]]. They both provided [[EIA RS-232 serial l
    3 KB (507 words) - 10:58, 29 March 2022
  • INTEL 80386 PROGRAMMER'S REFERENCE MANUAL
    DEC and flags that support a numerics coprocessor and multiple CPUs with shared
    890 KB (107,817 words) - 03:20, 3 January 2024
  • LSI-11
    ...BUS]], and using the [[LSI-11 chip set]]. It was the first of the [[LSI-11 CPUs]]; it had the same QBUS limitations, and use of [[QBUS CPU ODT|ODT]] for co The LSI-11 is a [[DEC card form factor|quad]] board (M7264) with additional functionality on-boar
    3 KB (411 words) - 22:06, 20 December 2023
  • LSI-11/2
    ...1/2''' (also known as the '''KD11-HA''') is the later type of the [[LSI-11 CPUs]], using the same [[LSI-11 chip set‎]]. It contains only the [[Central Pr It is a [[DEC card form factor|dual]] board (M7270); it supports all the same options as
    2 KB (336 words) - 18:34, 19 July 2023
  • UNIX* System V and 4.1C BSD
    Berkeley), based on experience with both systems on a DEC 10.3 DEC.......................................... 36
    113 KB (13,419 words) - 02:06, 17 December 2018
  • MM11-U core memory
    * G114 - [[DEC card form factor‎|hex-width]] sense/inhibit module The MM11-U/UP usually required a custom nine-slot [[backplane]] ([[DEC part number]] 54-10345 or 70-09295), although some [[Central Processing Uni
    6 KB (1,023 words) - 04:53, 22 October 2021
  • KB11
    ...[[Digital Equipment Corporation|DEC]] [[PDP-11]] [[Central Processing Unit|CPUs]]:
    679 bytes (112 words) - 05:57, 29 August 2018
  • Extended UNIBUS
    The '''Extended UNIBUS''' or '''EUB''' was [[Digital Equipment Corporation|DEC]]'s name for both an upgrade to their standard [[UNIBUS]] [[PDP-11]] bus, t ...their main backplanes (the ones which held their [[Central Processing Unit|CPUs]]).
    3 KB (556 words) - 16:00, 6 February 2024
  • PDP-11 Memory Management
    ...subset' machines, SSR1 and (usually) SSR3 are not implemented (the [[KDF11 CPUs]] are an exception to the latter; see below). ...[[PDP-11/70]], [[PDP-11/44]], and machines with the KDF11 CPUs and [[KDJ11 CPUs]].
    9 KB (1,311 words) - 18:10, 2 July 2023
  • KDF11 CPUs
    ...ingle-[[printed circuit board|board]] [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Fonz' [[F-11 chip set]]: * [[KDF11-A CPU]] - M8186 - [[QBUS]] [[DEC card form factor|dual]]-width CPU used in the [[PDP-11/23]]
    3 KB (394 words) - 13:49, 29 March 2022
  • KDF11-U CPU
    ...plugs into a custom slot in the likewise custom PDP-11/24 [[backplane]] ([[DEC part number]] 54-13817, assembly 70-16905). ...mplementing the [[PDP-11 Commercial Instruction Set]] (CIS) (not all KDF11 CPUs can hold this). In addition to the basic CPU functionality, the board also
    6 KB (1,087 words) - 16:16, 6 February 2024
  • KDJ11 CPUs
    There are several single-board [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Jaws' [[J-11 chipset]]: * [[KDJ11-A CPU]] - M8192 - [[QBUS]] [[DEC card form factor|dual]]-width CPU
    3 KB (457 words) - 14:32, 21 February 2023
  • F-11 chip set
    ...implementation of the [[PDP-11 architecture]]. It was used in the [[KDF11 CPUs]]. The main [[Central Processing Unit|CPU]] was implemented in two [[integr ...implements the [[PDP-11 Commercial Instruction Set]] (CIS); not all KDF11 CPUs can hold this, though.
    2 KB (384 words) - 23:50, 28 March 2022
  • FP11 floating point
    ...ng mode for each, and whether floating results were rounded, or 'chopped' (DEC's term for truncated, to avoid confusion with series truncation). * [[KEF11-A floating point chip|KEF11-A]], used in the [[KDF11 CPUs]]
    3 KB (406 words) - 20:42, 13 June 2023
  • LINC-8
    ...ata break]] mechanism). A combined [[front panel]] allowed control of both CPUs. ...ed of discrete [[transistor]] [[FLIP CHIP]]s, mostly R- and S-series, in [[DEC card form factor|standard-length single-height]] (width) format, with a few
    2 KB (328 words) - 13:46, 11 July 2023
  • KEF11-A floating point chip
    ...chip''' is an optional [[integrated circuit|chip]] for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It contains [[microcode]] to implement t ...03C7-AA (only the A revision of both has been seen). The entire carrier is DEC part # 57-00001-01-A1 (although 57-00001-00 is occasionally seen - but with
    899 bytes (153 words) - 17:43, 12 March 2021
  • KTF11-A memory management chip
    ...11-A memory management chip''' is an optional chip for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It implemented the standard [[PDP-11 Mem The KTF11-A chip was the DC304, [[DEC part number]] 21-15542-0n (where n is a digit giving the revision; 0 and 1
    762 bytes (124 words) - 13:41, 12 August 2022
  • System unit
    ...' is a standard modular [[backplane]] from [[Digital Equipment Corporation|DEC]], used mostly in [[UNIBUS]] [[PDP-11]]s. The initial system units were [[DEC card form factor|hex]] height, four-slot assemblies. (Sometimes a number of
    1 KB (178 words) - 15:45, 23 December 2023
  • UniBone/QBone
    '''UniBone''' and '''QBone''' are [[Digital Equipment Corporation|DEC]]-compatible [[FLIP CHIP]] cards which can be [[simulator]]s for a variety They emulate [[Central Processing Unit|CPUs]], [[main memory]], several [[disk]] subsystems and other peripherals in re
    645 bytes (87 words) - 22:33, 14 January 2024
  • VAX 88x0
    ...the difference between them being the number of [[Central Processing Unit|CPUs]] installed in the basic cabinet: * '''VAX 8820''' - 2 CPUs
    2 KB (204 words) - 04:31, 13 January 2024
  • VAX 7000 series
    ...[[Laser System Bus|LSB Bus]] system [[bus]]; the [[Central Processing Unit|CPUs]] (up to 6), [[main memory]] units, and an 'I/O port' (IOP) module attached They shared much of their cabinetry and components with the [[DEC Alpha|Alpha]]-based [[7000 AXP series]] systems, and also with the [[VAX 10
    2 KB (297 words) - 01:21, 2 January 2024
  • FPJ11 floating point accelerator
    ...a single chip which is plugged into a [[chip socket|socket]] on a [[KDJ11 CPUs|KDJ11 CPU]] card. Two versions of the FPJ11 exist; the FPJ11-AA and the FPJ11-AB. DEC had a number of problems with 'corner cases' (e.g. [[Direct Memory Access|D
    2 KB (276 words) - 21:06, 2 July 2023
  • BA11 mounting boxes
    ...960]] series of 19"-wide racks produced by [[Digital Equipment Corporation|DEC]]. Although they were intended to principally be rack-mounted, many were av ...BA11-K mounting box|BA11-K]] - used to hold both [[Central Processing Unit|CPUs]] as well as [[device controller]]s for UNIBUS -11's
    2 KB (341 words) - 03:06, 11 July 2023
  • UNICHANNEL 15 System
    * A data channel between the two CPUs, which allows them to interrupt each other; this channel is implemented wit ...15-HUCMA-B-D_UC15_Nov73.pdf UC15 unichannel-15 system maintenance manual] (DEC-15-HUCMA-B-D)
    1 KB (180 words) - 14:48, 28 November 2022
  • KD11-A CPU
    ...Time Clock]] (the latter being a standard option across a number of PDP-11 CPUs). The basic KD11-A was contained on four [[DEC card form factor|hex]] cards:
    4 KB (588 words) - 05:52, 8 April 2024
  • KB11-A CPU
    The KB11-A was the first of a [[KB11|series of PDP-11 CPUs]] which were modified versions of this design. ...1/1145/KB11-A_Maint.pdf KB11-A central processor unit maintenance manual] (DEC-11-HKBB-D)
    3 KB (395 words) - 21:08, 2 July 2023
  • PDP-11/74
    ...orporation|DEC]]; it could hold from two to four [[Central Processing Unit|CPUs]]. ...[[disk]]s and [[magnetic tape drive]]s, could be shared between two of the CPUs, using the multi-port capabilities of many [[MASSBUS]] devices; other devic
    2 KB (257 words) - 22:57, 21 August 2021
  • BC11A UNIBUS cable
    ...nnect together [[UNIBUS]] elements (such as [[:Category: UNIBUS Processors|CPUs]], [[system unit]]s, and free-standing [[peripheral|devices]] such as the [ Note that correct [[Digital Equipment Corporation|DEC]] nomenclature does not include a hyphen before the 'A'; an added hyphen, f
    1 KB (176 words) - 12:47, 16 October 2021
  • FPF11 floating point processor
    ...or]] module which provides high-performance [[floating point]] for [[KDF11 CPUs]] (which use the [[F-11 chip set]]); it implements [[FP11 floating point|FP It is a [[DEC card form factor|quad]] [[printed circuit board|board]] (the M8188) which p
    2 KB (383 words) - 02:31, 12 October 2022
  • LSI-11 chip set
    ...cessing Unit|CPU]] [[integrated circuit|chip]] set is used in the [[LSI-11 CPUs]] - the original [[LSI-11]], and the later [[LSI-11/2]]. Chip numbers of the form 23-xxxxx-rr, etc are [[DEC part number]]s (where 'rr' seems to represent a revision number - 0, if not
    5 KB (773 words) - 22:42, 20 December 2023
  • KM11-A Maintenance Set
    ...rform maintenance activities on early [[PDP-11]] [[Central Processing Unit|CPUs]] and some early PDP-11 [[peripheral]]s. As produced by DEC, a KM11 consists of a W131 Maintenance Indicator Module plugged into a W130
    3 KB (421 words) - 18:49, 27 February 2023
  • PDP-11 Bootstrap Loader
    [[QBUS CPU ODT‎|ODT]] in the [[LSI-11 CPUs]] also has a command to load programs in bootstrap loader format. ...cumented in some detail in the "paper tape software programming handbook" (DEC-11-GGPB-D), pp. 6-1 to 6-8.
    3 KB (527 words) - 19:52, 16 November 2023
  • LSI-11 CPUs
    ...orporation|DEC]]'s first cost-reduced [[PDP-11]] [[Central Processing Unit|CPUs]], using a [[microprocessor]] (the [[LSI-11 chip set]]). They also used a n The first [[LSI-11]] was a [[DEC card form factor|quad]] board (M7264) with additional functionality on-boar
    3 KB (453 words) - 16:35, 6 April 2024
  • KA650 CPU
    ...[[MicroVAX]], [[VAXserver]], and [[VAXstation]] systems. It is a single [[DEC card form factor|quad]]-height [[printed circuit board|PCB]] which plugs in The only differences between the two CPUs are the system [[ROM]]s:
    3 KB (369 words) - 08:32, 12 September 2023
  • DEC Modules by bus
    == [[DEC 4000]] Modules == | style="padding: 0 1em 0;" | DEC 4000-600 CPU 1MB cache [[#ref_5|[5]]]
    51 KB (6,185 words) - 15:20, 15 January 2024
  • PDP-11 family differences appendix
    ...n the fine details of their behavior. (Had [[Digital Equipment Corporation|DEC]] formalized the [[PDP-11 architecture]] earlier, these might not have happ | 03 || [[LSI11 CPUs]]
    2 KB (343 words) - 03:12, 13 September 2020
  • DEC part number
    ...' (sometimes the first hyphen is omitted). [[Digital Equipment Corporation|DEC]] had a system for their part numbers, such that looking at a part number w ...these numbers are ''not'' 'DEC part numbers', as defined by the applicable DEC specifications (below).
    3 KB (363 words) - 16:38, 14 August 2022
  • DA10 Twelve- and Eighteen-Bit Computer Interface
    ...[[PDP-10]] [[mainframe]]s to a variety of [[Digital Equipment Corporation|DEC]] [[minicomputer]]s which could be equipped with negative I/O [[bus]]es, fo ..., it could be connected to [[KA10]] and [[KI10]] [[Central Processing Unit|CPUs]], but only to [[KL10]]s with the optional [[DIA20 In/Out Bus Controller]]
    3 KB (442 words) - 14:51, 7 March 2023
  • DTE20 Ten-Eleven Interface
    ...or Interface''') is a [[peripheral]] on [[KL10]] [[Central Processing Unit|CPUs]] which allows a [[PDP-11]] to act as a [[front end]]. Depending on how the A 'restricted' DTE20 consists of a pair of [[DEC card form factor|hex]] boards (M8552, M8553) and a dual card (M8554), plugg
    2 KB (410 words) - 13:14, 12 November 2023
  • DIA20 IBus Adapter
    ...nal [[device controller|controller]] on [[KL10]] [[Central Processing Unit|CPUs]] which provides an old-style [[PDP-10 I/O Bus]] (termed an 'IBus'), to all It consists of a number of [[DEC card form factor|hex]] boards (two M8550s and an M8551) plugged into an I/O
    2 KB (282 words) - 12:34, 6 November 2023
  • DMA20 Memory Bus Adapter
    ...emory]] banks of [[PDP-10 memories]] will allow banks to be shared between CPUs.) It consists of ten [[DEC card form factor|hex]] boards (an M8560, M8563, and eight M8558 modules) pl
    2 KB (274 words) - 15:10, 9 November 2023
  • UNIBUS Device Addresses
    ...k is specifically called out that way in a [[Digital Equipment Corporation|DEC]] document (source indicated). CPU [[memory management]] registers marked with "%" do not exist in CPUs with the [[PDP-11 Memory Management#Simplified subset|'11/40' type memory m
    7 KB (927 words) - 11:26, 12 November 2021
  • UNIBUS and QBUS termination
    ...s necessary, but can be provided anywhere on the bus; most [[UNIBUS]]/QBUS CPUs do so, with the notable exception of the [[KD11-D CPU|KD11-D]] of the [[PDP ...). However, most PDP-11 CPUs (including all QBUS CPUs, such as the [[KDF11 CPUs]]) have it, and will time out unused grants. (This takes somewhat longer th
    7 KB (1,202 words) - 14:32, 28 November 2023
  • KDJ11-D CPU
    ...g the [[J-11 chip set]] of the [[PDP-11]] of the [[KDJ11 CPUs]]. It is a [[DEC card form factor|quad-height]] board, the '''M7554'''; it is available in t * [http://www.bitsavers.org/pdf/dec/pdp11/1173/EK-KDJ1D-UG_KDJ11-D_May87.pdf KDJ11-D/S CPU Module User's Guide]
    3 KB (529 words) - 12:01, 15 August 2022
  • M9302 UNIBUS terminator
    ...is a [[DEC card form factor|dual]] format card, intended for use in the [[DEC edge connector contact identification|two top (AB) sections]] of a [[Modifi ...permanent assertion of SACK. (In many [[PDP-11]] [[Central Processing Unit|CPUs]], that will [[KY11-L to CPU interface|freeze the CPU]].)
    1 KB (229 words) - 22:33, 7 March 2023
  • M8264 No-SACK Timeout Module
    ...out circuit]] which is not included in those two [[Central Processing Unit|CPUs]]. It was a [[DEC card form factor|quad]] format card, which plugged into any available [[Sma
    4 KB (740 words) - 16:41, 20 April 2022
  • VAX-11/750 & VAX-11/751 Revision Control
    11/750 CPUs, beginning with Serial No. BTO3096, and 11/751 CPUs, Revision, MR (Module Revision) or PR (Part Revision). DEC Standard 012
    101 KB (10,182 words) - 14:04, 2 July 2022
  • VAXcluster
    The HSC50, itself a cluster node, communicates with host cpus by way of the CI, using Digital’s MSCP (Mass Storage Control Protocol) fo DEC VAXclusters were introduced with VMS V3.0 in 1982.
    13 KB (1,908 words) - 19:25, 27 April 2024
  • KA650 Revision Control
    | 2-0 MicroVAX KA650 CPUS ......................................... 8... | Revision levels are tracked according to DEC Standard 068....
    135 KB (5,037 words) - 14:06, 2 July 2022
  • PDP-10 I/O Bus
    ...DT01C I/O Bus Switch allowed a device to be switched between two different CPUs. ...d circuit board|PCBs]] at each end, which plugged into slots in a standard DEC [[backplane]]; these later became the CJ connectors.
    1 KB (234 words) - 14:22, 23 October 2022
  • VAX 10000 series
    ...ranging from 1 to 4, depending on the number of [[Central Processing Unit|CPUs]] in the system. They shared much of their cabinetry and components with the [[DEC Alpha|Alpha]]-based [[10000 AXP series]] systems as well as the VAX 7000 se
    1 KB (210 words) - 01:28, 2 January 2024
  • Laser System Bus
    ...000 series]], and also used in other later [[Digital Equipment Corporation|DEC]] computers. ...s the bus interfaces considerably. The large [[cache]]s on the 7000 series CPUs made this tradeoff reasonable. The LSB is [[pipeline]]d, though; this allow
    3 KB (395 words) - 00:20, 1 April 2023
  • VAX 85x0, 8700, 88xx, and 897x systems
    ...n three different model designations VAX 85xx, VAX 8700, and VAX 8800, the DEC internal superordinate name was "VAX 8800 Family" from the beginning: ...e-stage [[pipeline]]. A high-speed memory interconnect, the NMI bus, links CPUs to memory and the I/O subsystem, which connects to VAXBI buses. Many reliab
    6 KB (844 words) - 22:15, 29 April 2024
  • Installing ULTRIX-11 V1.0 on SIMH
    Wed Dec 31 19:02:20 EST 1969 Wed Dec 31 19:32:43 EST 1969
    33 KB (4,919 words) - 12:31, 21 June 2023
  • Common File System
    [http://bitsavers.org/pdf/dec/pdp10/TOPS20/V7/MGR_GUIDE.MEM.txt TOPS-20 System Manager's Guide June 1990 explains in detail how the '''Common File System''' (CFS) works on the [[DEC]] [[PDP-10]], [[DECSYSTEM-20]] computer running the [[TOPS-20]] operating s
    53 KB (6,770 words) - 13:15, 16 November 2023
  • MCA20 Cache
    The MCA20 consists of 6 [[DEC card form factor|hex]] cards, of 3 types: ...here (including on the M8513 Cache Control card), and included in all KL10 CPUs.
    3 KB (490 words) - 18:09, 14 November 2023
  • M-bus
    The '''M-bus''' from [[Digital Equipment Corporation|DEC]] was a unique [[synchronous]] [[bus]] used in some [[VAXstation]]s. It sup ...tent data. The M-bus also supported [[interrupt]]s from [[peripheral]]s to CPUs. It used [[parity]] for [[error detection]].
    862 bytes (120 words) - 14:10, 15 January 2024
  • VAX 8200/8300 Revision Control
    | Revision levels are tracked according to DEC Standard 068.... | Part revisions are tracked according to DEC Standard 012 conventions. Each part has an alphanumeric revision, up to a
    198 KB (5,881 words) - 23:03, 28 March 2024
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