PDP-11/34

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PDP-11/34
Manufacturer: Digital Equipment Corporation
Architecture: PDP-11


A PDP-11/34 partially disassembled; the board on the left is for the KY11-LB Programmer's Console

The PDP-11/34 was DEC's lower-cost replacement to the PDP-11/40 as the low-end PDP-11 system capable of running time-sharing, using memory management; it had the limited memory management capabilities of the PDP-11/40, though. It was a UNIBUS machine; as such, it was normally limited to 248KB of main memory.

The CPU came in two variants: the KD11-E (M7265 and M7266), and the plug-compatible replacement KD11-EA (M8265 and M8266); machines with the latter were denominated as a PDP-11/34A. Both required the DD11-P backplane.

The latter had provision for the FP11-A floating point unit, and the KK11-A cache (the system could use either, or both).

Both could be provided with either the KY11-LA Operator's Console (a limited functionality console with only halt and boot functionality), or the KY11-LB Programmer's Console.

Apparently it was cloned in the Soviet Union as the SM 1420.

UNIBUS termination

Note that neither the KD11-E nor the KD11-EA has built-in termination and pull-ups (unusual for PDP-11 CPUs); this is almost certainly the reason that the manual calls for the use of either an M9301 ROM or M9312 ROM (which include bus termination) at the start of their UNIBUS, in slot 3 or 4 of the CPU's backplane.

Register access

Like its predecessor PDP-11/05, the general registers (R0-R5, SP and PC) have addresses assigned to them; they are also accessible from the UNIBUS, and therefore from the KY11-LB Programmer's Console, when the machine is halted. Their addresses are:

Address Register
777700 R0
...
777705 R5
777706 SP
777707 PC

Note that the registers are word-accessible at odd addresses on the UNIBUS (unlike any other device); and their addresses, like those on the -11/05, increment by 1, not by 2, as is usual for word-sized items.

In addition, some internal CPU registers are available at addresses 777710 -777717.

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