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- ...t Corporation|DEC]], originally released in 1975 in order to connect two [[PDP-11]] [[minicomputer]]s. It evolved into one of the first peer-to-peer network ...and [[VMS]] (from VMS V1.0 / DECnet-VAX V1.0) with communications between processors still limited to point-to-point links only. Introduction of file transfer17 KB (2,405 words) - 17:43, 13 January 2024
- | architecture = [[PDP-11]] ...is a family of [[real-time system|real-time]] [[operating system]]s for [[PDP-11]] computers, created by [[Digital Equipment Corporation|DEC]]; it was commo7 KB (1,188 words) - 22:11, 6 August 2023
- The '''PDP-11''' is a series of [[minicomputer]]s introduced in 1969 [1] by the [[Digital ....jpg|right|thumb|300px|[[Front panel]] of the [[KA11 CPU|KA11]], the first PDP-11 model]]10 KB (1,393 words) - 16:03, 23 April 2024
- ...from [[Digital Equipment Corporation|DEC]]. It was widely used in later [[PDP-11]]s and smaller [[VAX]]en. ...e warning is accurate, though: [http://web.frainresearch.org:8080/projects/pdp-11/micronotes/micronote28.txt MicroNote 28] says "MSV11-J MODULES CAN[NOT] BE13 KB (2,043 words) - 23:27, 14 January 2024
- [[Image:pdp11-23.jpg|150px|thumb|right|A PDP-11/23]] The '''PDP-11/23''' was the second [[QBUS]] [[PDP-11]] system; it used the [[KDF11-A CPU]] (M8189).2 KB (289 words) - 13:31, 15 May 2022
- * [[List of Programmed Data Processors]] * [[:Category:DEC Processors|DEC Processors]]5 KB (624 words) - 19:19, 19 March 2024
- DEC sold 4 different generations of PDP-10 processors: the [[KA10]], the [[KI10]], the [[KL10]], and the small [[KS10]]. All exce ...Synchronous Communication Multiplexer uses a DL10 to communicate with a [[PDP-11/20]] which has one or more [[DS11 Multiple Line Synchronous Interface]]s to11 KB (1,640 words) - 20:59, 8 March 2024
- ...the same as a PDP-11/70 and executes most programs somewhat faster than a PDP-11/70. ...es), and that a long has its two halves stored in a different order on the PDP-11 than on the VAX-11. Characters still suffer sign extension when converted t49 KB (7,745 words) - 14:29, 6 May 2023
- ...igh-performance [[Metal Oxide Semiconductor|CMOS]] implementation of the [[PDP-11 architecture]], used in both the [[KDJ11 CPUs]], and a variety of periphera It implements the full [[PDP-11 Memory Management]] architecture (with split Instruction and Data address s2 KB (242 words) - 23:19, 29 February 2024
- The '''KDF11-A CPU''' is a [[PDP-11]] [[Central Processing Unit|CPU]] for the [[QBUS]]; it is a [[DEC card form ...chip]] and the [[KEF11-A floating point chip]], but not the [[KEF11-B]] [[PDP-11 Commercial Instruction Set]] (CIS); for higher performance [[floating point3 KB (424 words) - 02:05, 10 July 2023
- ...oard, and was used to upgrade [[PDP-11/23]] systems. (Confusingly, no DEC 'PDP-11/xx' system is specified as using the KDJ11-A.) [[Category: PDP-11 QBUS Processors]]2 KB (355 words) - 21:05, 2 July 2023
- ...set|LSI-11]] [[Central Processing Unit|CPU]] which adds support for the [[PDP-11 Extended Instruction Set]] and also [[FIS floating point]]. [[Category: PDP-11 Processors]]758 bytes (123 words) - 14:07, 30 June 2023
- ...computers. The largest one I've used was for an AT&T call centre with 32 processors and 1GB of RAM serving X11 sessions to users which then ran x3270 sessions [[Category: PDP-11 Operating Systems]]1 KB (190 words) - 04:26, 29 December 2022
- ...itecture|PDP-11]] [[Central Processing Unit|CPU]] for the [[PDP-11/23_PLUS|PDP-11/23+]] was implemented as a single [[DEC card form factor|quad]] card, the K ...so hold the [[KEF11-B CIS chip|KEF11-B]] 6-chip carrier implementing the [[PDP-11 Commercial Instruction Set]].3 KB (507 words) - 10:58, 29 March 2022
- ...to any other country of the "eastern bloc". The VAX had an appeal with its PDP-11 compatibility mode, and it was microcoded, so the main goal was to construc :: ''244 native instruction + PDP-11 instructions for compatibility mode4 KB (587 words) - 00:38, 2 January 2024
- ...are mostly arranged in groups of eight, with one of each group for each [[PDP-11 architecture#Addressing modes|addressing mode]] in the [[operand]]s. (In th [[Category: PDP-11 UNIBUS Processors]]31 KB (3,760 words) - 05:02, 5 November 2022
- compatible with the PDP-11 version 7 system and now sup- of the PDP-11 C compiler.39 KB (5,307 words) - 05:01, 11 December 2018
- ...I-11''', first shipped in the Fall of 1975, was DEC's first cost-reduced [[PDP-11]] [[Central Processing Unit|CPU]], introducing the [[QBUS]], and using the ...1-C Commercial Instruction Set|KEV11-C]] provides a subset of the PDP-11 [[PDP-11 Commercial Instruction Set|CIS]] (it also apparently includes the EIS, but3 KB (411 words) - 22:06, 20 December 2023
- ...cial Instruction Set|KEV11-C]], which provides a subset of the PDP-11 [[PDP-11 Commercial Instruction Set|CIS]] (it also apparently includes the EIS, but * [http://web.frainresearch.org:8080/projects/pdp-11/lsi-11.php LSI-11 Processors]2 KB (336 words) - 18:34, 19 July 2023
- ...ram]]s. It allows additional, custom [[instruction]]s to be added to the [[PDP-11]] [[instruction set]]. * [http://www.bitsavers.org/pdf/dec/pdp11/1103/ PDP-11/03] - documentation at [[Bitsavers]]2 KB (337 words) - 21:12, 2 July 2023
- 2.6.3 PDP-11 compatibility................. 18 2.9BSD has vfork for the PDP-11. 4.3BSD will eliminate113 KB (13,419 words) - 02:06, 17 December 2018
- The '''KL10''' was the third generation of [[PDP-10]] processors. It was built out of [[Emitter-coupled logic|ECL]], on [[DEC card form fact ...]]s; they allowed connection of a [[PDP-11]] [[front end]]. At least one PDP-11, the 'master', was ''required''; it could [[bootstrap]] the KL10, including11 KB (1,737 words) - 13:06, 2 April 2024
- ...''KA10''' was the first generation of [[PDP-10]] [[Central Processing Unit|processors]] (themselves, exact re-implementations of the earlier [[PDP-6]] architectu [[Category: PDP-10 Processors]]2 KB (298 words) - 07:28, 6 September 2023
- The '''KI10''' was the second generation of [[PDP-10]] processors (themselves, exact re-implementations of the earlier [[PDP-6]] architecture [[Category: PDP-10 Processors]]3 KB (382 words) - 13:23, 5 November 2023
- [[Image:KY11-LB.jpg|thumb|right|300px|A KY11-LB Programmer's Console on a PDP-11/04]] ...1-LB Programmer's Console''' was an option for the [[PDP-11/04]] and the [[PDP-11/34]] (the units for the two machines differed only in the number painted on7 KB (1,114 words) - 20:56, 24 October 2022
- ...the progenitor of the semi-standard [[FP11 floating point]] used in many [[PDP-11]]s. [[Category: PDP-11 UNIBUS Processors]]1 KB (201 words) - 02:17, 13 October 2022
- ...ogenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s. [[Category: PDP-11 UNIBUS Processors]]1 KB (209 words) - 02:18, 13 October 2022
- ...rd form factor|quad-height]] board, and is used in the [[PDP-11/83]] and [[PDP-11/84]] systems. ...rts the [[KTJ11-B UNIBUS adapter]], a QBUS->[[UNIBUS]] adapter used in the PDP-11/84.2 KB (391 words) - 16:40, 6 February 2024
- ...rd form factor|quad-height]] board, and is used in the [[PDP-11/93]] and [[PDP-11/94]] systems. [[Category: PDP-11 QBUS Processors]]2 KB (254 words) - 16:41, 6 February 2024
- ...apability to systems built around those CPU cards, the [[PDP-11/84]] and [[PDP-11/94]] systems respectively. ...ed as regular Q22/CD QBUS slots, by removing two jumpers. EK-PDP84-TM-PR4 (PDP-11/84 Technical Manual) says (in section 2.1.14, "Backplane (H9277-A)", pg. 2-6 KB (1,060 words) - 16:35, 6 February 2024
- ...ing Unit|CPU]] of the [[PDP-11/20]], the first [[PDP-11]]. It was the only PDP-11 CPU which was not [[microcode]]d (since the cheap [[read-only memory|ROMs]] ...a 16x16 [[register file]], of which half are used to hold the machine's [[PDP-11 architecture|general registers]]; two of the others are used for internal t9 KB (1,356 words) - 23:10, 29 February 2024
- The '''KDF11 CPUs''' are single-[[printed circuit board|board]] [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Fonz' [[F-11 chip set ...] - M8186 - [[QBUS]] [[DEC card form factor|dual]]-width CPU used in the [[PDP-11/23]]3 KB (394 words) - 13:49, 29 March 2022
- ...e other [[KDF11 CPUs]]. It plugs into a custom slot in the likewise custom PDP-11/24 [[backplane]] ([[DEC part number]] 54-13817, assembly 70-16905). ...ouble-width [[KEF11-B CIS chip|KEF11-B]] 6-chip carrier implementing the [[PDP-11 Commercial Instruction Set]] (CIS) (not all KDF11 CPUs can hold this). In a6 KB (1,087 words) - 16:16, 6 February 2024
- There are several single-board [[PDP-11]] [[Central Processing Unit|CPUs]] which all use the 'Jaws' [[J-11 chipset] ...M8190 - QBUS quad-width CPU used in the [[PDP-11/73]], [[PDP-11/83]] and [[PDP-11/84]]3 KB (457 words) - 14:32, 21 February 2023
- ...ed 'Fonz') was [[DEC]]'s second [[microprocessor]] implementation of the [[PDP-11 architecture]]. It was used in the [[KDF11 CPUs]]. The main [[Central Proce ...e optional [[KTF11-A memory management chip]] which implemented standard [[PDP-11 Memory Management]], and the optional [[KEF11-A floating point chip]] which2 KB (384 words) - 23:50, 28 March 2022
- [[Category: PDP-11 Processors]]181 bytes (30 words) - 16:09, 16 December 2018
- ...point chip''' is an optional [[integrated circuit|chip]] for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It contains [[microcode]] to implem [[Category: PDP-11 Processors]]899 bytes (153 words) - 17:43, 12 March 2021
- .... It implemented the standard [[PDP-11 Memory Management]] (but only the [[PDP-11 Memory Management#Simplified subset|simplified subset]]). [[Category: PDP-11 Processors]]762 bytes (124 words) - 13:41, 12 August 2022
- ...nt]] unit for the [[KD11-A CPU]] of the [[PDP-11/40]]. It implements the [[PDP-11]] [[FIS floating point]], not the full [[FP11 floating point]]. [[Category: PDP-11 UNIBUS Processors]]2 KB (246 words) - 02:34, 12 October 2022
- ...1-E CPU''' was the first [[Central Processing Unit|CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit bo ...t|floating point]] unit or the [[KK11-A Cache Memory|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.5 KB (791 words) - 02:23, 6 December 2022
- ...he [[Central Processing Unit|CPU]] for the [[PDP-11/34A]] version of the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit bo | E74 || 23-110A1 || 32x8 || [[PDP-11 Extended Instruction Set|EIS]] Decoder6 KB (1,045 words) - 22:47, 31 March 2022
- [[Image:KY11-LA.jpg|thumb|right|300px|A KY11-LA Operator's Console on a PDP-11/04]] ...''' was the standard basic [[front panel]] for the [[PDP-11/04]] and the [[PDP-11/34]] (the units for the two machines differed only in the number painted on2 KB (358 words) - 18:29, 3 April 2022
- ...[[floating point]] [[co-processor]] for the DCJ11 [[J-11 chip set|J-11]] [[PDP-11]] [[Central Processing Unit|CPU]] [[integrated circuit|chip]], which implem * [https://www.subgeniuskitty.com/development/pdp-11/references/fpj11_compat DCJ11/FPJ11 Compatibility]2 KB (276 words) - 21:06, 2 July 2023
- The '''KS10''' was the fourth and last generation of [[PDP-10]] processors (themselves, exact re-implementations of the earlier [[PDP-6]] architecture [[Category: PDP-10 Processors]]8 KB (1,237 words) - 19:48, 14 July 2023
- ...[DEC card form factor|hex]] board, the '''M8267'''. It supports the full [[PDP-11]] [[FP11 floating point]]. ..., and a 10 pin connector to the M8266 card. (This was likely because the [[PDP-11/34]] could be field-upgraded from a [[KD11-E CPU]], which did not support t4 KB (734 words) - 02:17, 13 October 2022
- ...U through an '[[over the back]]' connector. (This was likely because the [[PDP-11/34]] could be field-upgraded from a [[KD11-E CPU]], which did not support t ...s are at the same locations as some of the memory/cache registers in the [[PDP-11/70]], but they are generally incompatible with those in the /70, except as4 KB (553 words) - 02:36, 12 October 2022
- ...''' [[PDP-11]] [[Central Processing Unit|CPU]] for the [[PDP-11/35]] and [[PDP-11/40]] was a multi-board [[microcode|micro-programmed]] processor. Support for the [[PDP-11 Extended Instruction Set|EIS]] was optional, with the [[KE11-E Extended Ins4 KB (588 words) - 05:52, 8 April 2024
- ...the PDP-11's [[main memory]], and vice versa (although the ability of the PDP-11 to do so is limited by the DL10's settings). ...also up to two [[PDP-10 I/O Bus]]ses (allowing it to be controlled by both processors in a multi-[[Central Processing Unit|CPU]] system). So, it could be connect5 KB (664 words) - 17:27, 7 November 2023
- ...[graphics terminal]]s, and provide [[Chaosnet]] [[front end]]s to [[KL10]] processors. [[Category: PDP-11 Operating Systems]]3 KB (347 words) - 08:50, 27 February 2024
- ...''' [[PDP-11]] [[Central Processing Unit|CPU]] for the [[PDP-11/05]] and [[PDP-11/10]] was a two-board [[microcode|micro-programmed]] processor contained on ...-cost PDP-11s, it did not support either hardware [[floating point]], or [[PDP-11 Extended Instruction Set|EIS]]. It did include an [[asynchronous serial lin11 KB (1,726 words) - 21:07, 2 July 2023