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  • The '''Extended Memory Interconnect''' (usually given as the acronym: '''XMI''') was a [[bus]] int ...cessor]]. The bus has special capabilities to support the shared access to memory required by such a system.
    3 KB (491 words) - 01:43, 8 May 2024

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  • ...i-user version that was an adaptation of the earlier RSX-11D for a smaller memory footprint, it was popular on all PDP-11s; [[Dave Cutler]] was the project l *RSX-11S -- a memory-resident version of RSX-11M used in embedded real-time applications.
    7 KB (1,188 words) - 22:11, 6 August 2023
  • '''RSTS/E''' (an acronym for '''Resource Sharing Time Sharing Extended''') was a [[multi-user]] [[time-sharing|time-shared]] [[operating system]] ...duced in 1973, to take advantage of the memory mapping hardware and larger memory support introduced with the [[PDP-11/45]]. Starting with V5B, RSTS/E suppo
    14 KB (2,134 words) - 16:06, 3 May 2023
  • ...nd the ability for devices to do [[Direct Memory Access|DMA]] transfers to memory, and to [[interrupt]] the CPU. ...he top 8 Kbytes of [[address space]] was reserved for the registers of the memory mapped I/O devices used in the [[PDP-11 architecture]]; this block is often
    13 KB (2,162 words) - 23:26, 14 January 2024
  • | memory speed = [[MM11-E and MM1-F core memories|MM11-E]]: 500 nsec [[access | memory mgmt = none standard
    6 KB (900 words) - 19:27, 31 December 2023
  • ...upported only the [[UNIBUS]], which normally limited it to 248KB of [[main memory]]. ...1KW of read-write microcode), an Extended Control Store (1.5KW [[Read-only memory|ROM]] microcode), or a Diagnostic Control Store.
    3 KB (461 words) - 16:34, 11 January 2022
  • ...of [[main memory]], using the [[Extended UNIBUS]] between the [[CPU]] and memory; all devices were attached to a semi-separate (see below) UNIBUS. ...ess space]] was statically mapped across to the low 248 Kbytes of EUB main memory, using a cross-connection path on the [[Central Processing Unit|CPU]] board
    8 KB (1,395 words) - 23:37, 29 February 2024
  • ...emory Bus and integrated [[MASSBUS]], relying instead on the UNIBUS, and [[Extended UNIBUS|EUB]]. Its [[Central Processing Unit|CPU]], the [[KD11-Z CPU|KD11-Z] ...[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses.
    4 KB (584 words) - 23:42, 29 February 2024
  • ...]] platform, after the [[PDP-11/45]] (albeit with a subset of the [[PDP-11 Memory Management]] [[architecture]]). The [[Original Equipment Manufacturer|OEM]] * [[KT11-D Memory Management]]
    4 KB (664 words) - 19:08, 8 February 2024
  • ...-C Memory Management Unit]] (the first implementation of the full [[PDP-11 Memory Management]]). ..., using 350 nsec [[Metal Oxide Semiconductor|MOS]] or 300 nsec [[bipolar]] memory, respectively.
    6 KB (895 words) - 23:52, 29 February 2024
  • ...through the [[MX15-B Memory Multiplexer]], directly to the PDP-15's [[main memory]]. ...hat it only supports [[Q16]] QBUS mode when writing data. The two extended memory bits in the CSR have no effect; they may be read and written, but are not c
    14 KB (2,038 words) - 23:04, 13 September 2023
  • ...he basic [[address space]] was 16 bits, most models could hold more [[main memory]] than that, although only a limited subset was visible to the [[program]] ...early life, when small and expensive [[core memory]] was the standard main memory; and in its later life, when the 16-bit address space became a severe limit
    13 KB (1,949 words) - 17:37, 29 February 2024
  • | memory speed = 1.2 μseconds | memory mgmt = [[bank switching|bank selection]], CPU mode
    4 KB (618 words) - 14:11, 14 July 2023
  • * In this era of carefully counting clock cycles and limited memory, it was inefficient to write speed-dependent programs that ran on a runtime ...] and [[Apple IIc]] models' BASIC interpreters for the new machines' extra memory and double-resolution graphics, or for the [[Apple IIgs|Apple II<small>GS</
    8 KB (1,203 words) - 19:34, 20 June 2023
  • ...iscellaneous improvements, including solid state memory (instead of [[core memory|core]]), thus the '/S'. ..., and [[hardware]] test [[program]]s, were implemented in a 1K [[Read-only memory|ROM]].
    8 KB (1,313 words) - 13:52, 11 July 2023
  • | virtual address = 13 bits (direct), 15 bits (extended) | memory speed = 1.75 μsec
    3 KB (418 words) - 14:35, 11 July 2023
  • ...of a number of separate free-standing units of various types (CPUs, [[main memory]], etc), connected together with [[bus]]ses carried in point-point cables. ...ent busses: there are different types of bus for main memory (the [[PDP-10 Memory Bus]]), and [[peripheral]]s. On the KA10 and KI10 models, the [[PDP-10 I/O
    11 KB (1,640 words) - 20:59, 8 March 2024
  • The PDP-8's basic configuration had a [[main memory]] (all [[core memory]], in the early models) of 4,096 twelve-[[bit]] [[word]]s (that is, 4K word ...time of 1.5 microseconds, so that a typical two-cycle ([[Fetch]], Execute) memory-reference instruction ran at a speed of 0.333 MIPS.
    22 KB (3,497 words) - 19:34, 29 November 2022
  • ...after electrical buses, or busbars. Almost always, there was one bus for memory, and another for peripherals, and these were accessed by separate instructi Some time after this, some computers began to share memory between several CPUs. On these computers, access to the bus had to be prio
    14 KB (2,170 words) - 05:09, 5 September 2019
  • * [[Main memory]]: Rotating drum with 512 32-bit words ''(some sources say 36 bits, which c ...ut: 5-channel paper tape and a Teletype printer. This appears to have been extended somewhat later, see the "Faster than thought" reference above
    4 KB (647 words) - 20:59, 18 March 2024
  • total memory = 16328 KB<br> avail memory = 12480 KB<br>
    6 KB (970 words) - 18:48, 12 August 2010
  • ...C continued to use the name up into the period when [[DEC card form factor|extended-length quad-height]] cards started to appear, e.g. in the [[KA11 CPU]]. How ...lized modules that are part of a specific larger (sub)-system (e.g. [[core memory]] drivers).
    10 KB (1,460 words) - 15:50, 6 March 2024
  • | memory speed = 2 μsec (Model 30)<br>780 nsec (Model 91) | memory mgmt = [[protection key]]s (most models)
    15 KB (2,167 words) - 14:58, 23 January 2024
  • | physical address = 32k words (requires optional Type 183 Memory Extension) | memory speed = 1.5 μseconds
    3 KB (365 words) - 18:28, 8 February 2024
  • | memory speed = 1.5 μseconds | memory mgmt = bank selection, CPU mode
    3 KB (416 words) - 14:10, 14 July 2023
  • ...[[multi-processor]]s with up to 4 [[Central Processing Unit|CPUs]]. [[Main memory]] was also connected to the SCU. The VAX 9000 used the [[Extended Memory Interconnect|XMI]] as its [[input/output|I/O]] [[bus]]; up to 4 were possib
    3 KB (417 words) - 00:45, 7 May 2024
  • ...searchers sharing a machine (dangerous, since the -11/20 had no hardware [[memory management]]) that a second -11/20 was purchased for the sole use of the pa ...g remained on the RF11. The version which we have also required a [[KE11-A Extended Arithmetic Element|KE11-A]] (use is made of it throughout the [[kernel]]).
    6 KB (926 words) - 19:13, 29 February 2024
  • ..., generally given as the acronym) was [[Unix/32V]] with a better [[virtual memory]] system, that went from 32V's [[swapping]], to a paged system. Additional ...vailable features of the UNIX/32V system, as extended to provide a virtual memory environment and other enhancements at U. C. Berkeley."
    2 KB (340 words) - 14:44, 21 December 2023
  • ...le of the disk, and it allowed for larger file systems, long filenames and extended attributes. A later [[service pack]] allowed for 386 and above CPUs to use OS/2 1.2 from IBM included the 'standard' edition, along with the EE or extended edition. The EE edition included basic communications capability (x.25, rs
    22 KB (3,500 words) - 04:39, 13 January 2024
  • ...o the point where people avoided MS-DOS 4.00 to run this version. It added extended partition and logical drives. MS-DOS 3.3 also included some support for the ...was made popular allowing 386's to simulate [[EMS memory]] with [[extended memory]], and loading device drivers & TSR's into the reserved hardware space.
    8 KB (1,327 words) - 07:03, 22 May 2023
  • | type = Multi-tasking, multi-user, virtual memory ...ran on [[KA10]]s which were modified with MIT-designed and built [[virtual memory|paging]] [[hardware]] (which that generation of PDP-10 [[Central Processing
    12 KB (1,926 words) - 21:29, 8 February 2024
  • primitive to the "light" ( "threads"), memory 1: Support for USB disks (simulations in memory, "pen drive"),
    91 KB (12,020 words) - 17:55, 13 August 2019
  • using 245 buffers containing 1672192 bytes of memory using 239 buffers containing 1672192 bytes of memory
    13 KB (1,865 words) - 18:41, 3 July 2022
  • The Maximum amount of memory was 256MB. The Magnum also had an [[Extended Industry Standard Architecture|EISA]] bus for expansion.
    2 KB (309 words) - 13:16, 27 February 2024
  • Corollary Extended C-bus 486DX2/66 Colorado Memory Systems Jumbo 250
    144 KB (18,526 words) - 03:17, 17 December 2018
  • ...wever, it furthered the development of the kernel so that it could use XMS memory, and it later introduced a 286-specific version that could do some limited ...64kb of RAM. Windows/286 was expected to run with MS-DOS 3.3, so the high memory area was not in use, nor was there a himem.sys at the time. DOS extenders
    5 KB (732 words) - 20:11, 13 January 2024
  • Memory and More PDS ELITRA PENT-90 VIP Memory and More PDS NETSTATION PENT-90 PCI
    279 KB (34,581 words) - 03:21, 17 December 2018
  • ...of small pages. Sufficient hardware exists to make demand paging a viable memory management strategy. All console functions are handled by an LSI-11 microco * 0.5 megabytes memory with battery backup
    49 KB (7,745 words) - 14:29, 6 May 2023
  • ...n of this paper appeared under the title ''Setting up the Berkeley Virtual Memory Extensions to the UNIX Operating System'' and, no doubt, references to this ...programs in bytes. For example, if your machine has only 512K bytes of memory, then xxx will be 524228, i.e. exactly 512K.
    42 KB (6,834 words) - 03:01, 17 January 2023
  • ...[[asynchronous serial line]]s, etc. It does support the optional [[KTF11-A memory management chip]] and the [[KEF11-A floating point chip]], but not the [[KE ...ce]] is limited to 256 Kbytes). In the later models, a bit in the [[PDP-11 Memory Management#Control|SSR3]] CPU [[register]] must be set to allow use of more
    3 KB (424 words) - 02:05, 10 July 2023
  • ...are commands to the device to perform various functions, stored in [[main memory]]. * NXM - Nonexistent Memory
    3 KB (369 words) - 20:54, 31 December 2023
  • ...eral Controller|SPC]] slot. Data is transferred to the host using [[Direct Memory Access|DMA]]; installation of a TUK50 thus requires removal of the [[Non-Pr ...ut extension - With the jumper removed, the non-existent memory timeout is extended from 28 nanoseconds to 37 microseconds; the manufacturing configuration is
    2 KB (363 words) - 15:09, 24 April 2024
  • ...a [[QBUS]]/[[Private Memory Interconnect|PMI]] [[Dynamic RAM|DRAM]] [[main memory]] card. As a PMI card, it uses the [[CD interconnect]]; it can therefore '' ...s at even word locations, the other for those in odd; the banks are thus [[memory interleaving|interleaved]]. A read cycle from the bus will start a read of
    8 KB (1,374 words) - 00:43, 30 July 2023
  • The '''IBM XT''', formally the '''IBM 5160''' was an extended version of the first [[IBM PC]], the [[IBM 5150]]. It provided extra slots, Since the [[i8086|8088]] CPU could address 1MB of RAM, the memory map was split in a 640KB for OS & programs, and 384KB for hardware buffers
    1 KB (173 words) - 14:00, 19 October 2018
  • - Memory paging with copy-on-write - Support for extended memory up to 16M on 386 and above
    5 KB (803 words) - 01:20, 20 December 2018
  • makes extensive use of 386 memory management and task primitives. - Memory paging with copy-on-write
    5 KB (824 words) - 01:26, 20 December 2018
  • extensive use of 386 memory management and task primitives. - Memory paging with copy-on-write
    6 KB (879 words) - 01:25, 20 December 2018
  • ...''' was a [[MASSBUS]] [[device controller]] for the [[VAX-11/750]]'s [[CPU/Memory Interconnect]] (CMI). It was implemented on one [[DEC card form factor|extended hex]] card, which mounts in the VAX-11/750 [[backplane]] in one of the thre
    1 KB (165 words) - 17:02, 15 May 2024
  • total memory = 16328 KB avail memory = 12480 KB
    8 KB (1,125 words) - 02:02, 18 November 2010
  • The mem messages give the amount of real (physical) memory and the memory available to user programs in bytes. For
    57 KB (8,582 words) - 03:00, 17 January 2023
  • 2.1 Memory Organization and Segmentation 2.5.3 Memory Operands
    890 KB (107,817 words) - 03:20, 3 January 2024
  • System/2 supports large memory, multiple applications, graphics and o 16MB Addressable Random Access Memory Support
    50 KB (7,113 words) - 03:35, 17 December 2018
  • 2.1.3 Memory Management 2.2.2.1 Memory Utilization
    627 KB (92,395 words) - 03:42, 17 December 2018
  • ...es that addresses in 32-bit mode are also signed, which limits the virtual memory space to 2GB for 32-bit mode. 64-bit mode can address 1TB (see infobox: Onl
    2 KB (383 words) - 02:35, 20 October 2018
  • *64mb memory ; Memory : 64mb
    44 KB (6,192 words) - 09:30, 29 September 2023
  • ...struction Set|EIS]]/[[FIS floating point|FIS]] instructions; the [[KEV11-B Extended Instruction Set|KEV11-B]] provides EIS without FIS; the [[KEV11-C Commercia ...version includes 4KW of [[Metal Oxide Semiconductor|MOS]] [[Random Access Memory|RAM]] on-board; the KD11-H version has the RAM deleted.
    3 KB (411 words) - 22:06, 20 December 2023
  • ...the [[LSI-11]] which provides a [[user]]-[[programmable]] [[microcode]] [[memory]] extension, along with some [[hardware]] aids to [[debug]]ging micro-[[pro ...and a [[flat cable]] which runs from the KUV11 to a free micro-[[Read-only memory|ROM]] [[chip socket]] on the CPU card, and gives the KUV11 access to the mi
    2 KB (337 words) - 21:12, 2 July 2023
  • 6.2.3 Extended (network) file system....... 28 extended and enhanced.
    113 KB (13,419 words) - 02:06, 17 December 2018
  • ...cumented, using 256Kx1 DRAMs). (The card may be configured to provide less memory than is physically present.) ...older [[LSI-11]] systems, including the LSI-11/2.) Internal or external [[memory refresh]] may be used
    10 KB (1,534 words) - 14:12, 22 September 2022
  • ...sold UNIBUS [[main memory]] cards. All the early UNIBUS memory was [[core memory|core]]; the first [[Dynamic RAM|DRAM]]s did not appear until some time afte ===Core memory===
    1 KB (216 words) - 03:05, 1 October 2021
  • ...that backplane; others carry additional [[voltage]]s (primarily for [[core memory]]). ...y in the C-F connectors (needed for signals for [[interrupt]]s or [[Direct Memory Access|DMA]], for devices which did those), with most UNIBUS signals presen
    4 KB (708 words) - 16:06, 30 March 2023
  • ...[[core memory]]), 500 nsec (later [[Metal Oxide Semiconductor|MOS]] [[main memory]]) | memory mgmt = [[paging]], 512-word pages
    11 KB (1,737 words) - 13:06, 2 April 2024
  • ...ctions of the console, it communicated with the PDP-11 CPU and with [[main memory]] over the [[UNIBUS]]; a pair of additional backplane lines (Halt Request, To enable the extended maintenance functions which the KY11-B can perform, one (-11/04) or two (-1
    7 KB (1,114 words) - 20:56, 24 October 2022
  • }}The '''NORD-12''' was a slightly slower and memory-limited variant of the [[NORD-10]] ...support the paging option of the NORD-10 and thus the memory could not be extended above 64 kwords
    2 KB (293 words) - 14:06, 7 June 2016
  • The '''Extended UNIBUS''' or '''EUB''' was [[Digital Equipment Corporation|DEC]]'s name for ...[[DEC card form factor|hex]] slot, and could hold only special EUB [[main memory]] cards, the only EUB cards ever produced. The only machines to support the
    3 KB (556 words) - 16:00, 6 February 2024
  • The '''KT11-B Paging Option''' is a [[memory management]] option for the [[PDP-11/20]], produced by [[Digital Equipment ...it made to a page which is not 'resident' (i.e. present in physical [[main memory]]), the [[instruction]] is stopped so the missing page can be made resident
    15 KB (2,571 words) - 22:23, 11 October 2022
  • ...w [[Direct Memory Access|DMA]] devices on the UNIBUS access to all of main memory. ...in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.)
    2 KB (310 words) - 04:15, 7 January 2021
  • ...only PDP-11 CPU which was not [[microcode]]d (since the cheap [[read-only memory|ROMs]] which make micro-programming cost-effective in smaller machines were The KA11 was implemented as a set of [[DEC card form factor|extended length]] [[FLIP CHIP]]s, containing early [[74 series]] [[transistor-transi
    9 KB (1,356 words) - 23:10, 29 February 2024
  • ...vel internal entities such as the associative memories, and the scratchpad memory. The heart of the KT11-B is the scratchpad memory, which is used to hold both cached [[page table]] entries, and also most of
    31 KB (4,983 words) - 18:22, 2 July 2023
  • |Current Memory Address Register || MTCMA || 772526 ...PEVN || colspan=3 | Unit Select || CUR || INT ENB || colspan=2 | Extended Memory || colspan=3 | Function || GO
    10 KB (1,388 words) - 02:36, 10 February 2024
  • [[Image:KDF11-U.jpg|300px|thumb|right|KDF11-U card with [[KTF11-A memory management chip|KTF11-A]] and [[KEF11-A floating point chip|KEF11-A]]]] ...the [[KTF11-A memory management chip|KTF11-A]] [[PDP-11 Memory Management|memory management]] and [[KEF11-A floating point chip|KEF11-A]] [[floating point]]
    6 KB (1,087 words) - 16:16, 6 February 2024
  • ...urrent code is somewhat inelegant, since the generic code to recognize the extended interface is currently in the serial line driver (dl.c), and not in the stt * [[Unix V6 kernel memory layout]]
    3 KB (471 words) - 18:25, 2 July 2023
  • ...(including internal registers not visible to the programmer) and/or [[main memory]], through the [[Arithmetic logic unit|ALU]] (while selecting which [[opera ...mputer introduced the concept of a '''control store'''; a wide [[read-only memory]] whose outputs directly controlled internal elements of the CPU. (E.g. one
    6 KB (853 words) - 14:25, 22 January 2024
  • ...d Instruction Set]], which allows the [[microcode]] of the basic CPU to be extended. The KE11-F includes its own microcode [[read-only memory|ROM]], which provides an additional 8 bits width of microcode (to control t
    2 KB (246 words) - 02:34, 12 October 2022
  • ...' was a [[parallel interface]] for the [[UNIBUS]], one which used [[Direct Memory Access|DMA]] to transfer data to a user device. ..., an overflow in the Bus Address Register does not carry into the Extended Memory bits in the CSR.
    5 KB (766 words) - 03:15, 25 November 2022
  • ...FP11-A]] [[FP11 floating point|floating point]] unit or the [[KK11-A Cache Memory|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] The KD11-E makes heavy use of [[Read-only memory#PROM|PROMs]], to hold the microcode, to control the [[arithmetic logic unit
    5 KB (791 words) - 02:23, 6 December 2022
  • ...ting point]] ([[FP11 floating point]] type) unit and/or the [[KK11-A Cache Memory|KK11-A]] [[cache]] (it could work with either, or both). ...CPU#Implementation|that of the KD11-E]], except that the 512x4 [[Read-only memory#PROM|PROMs]] of the KD11-E were replaced by 1024x4 [[integrated circuit|chi
    6 KB (1,045 words) - 22:47, 31 March 2022
  • /Fe<file> name executable file /FR[file] name extended .SBR file /TP compile all files as .cpp /Zm<n> max memory alloc (% of default)
    7 KB (913 words) - 02:04, 17 December 2018
  • ...binary being constructed (DOS, Windows EXE, Windows DLL) with the correct memory model for the application. -MEMORY MODEL-
    8 KB (976 words) - 02:02, 17 December 2018
  • ...memory]] and [[input/output|I/O]] adapters communicated via the [[Extended Memory Interconnect|XMI]] [[bus]].
    5 KB (596 words) - 23:39, 1 January 2024
  • ...ached to the LSB. The IOP was an adaptor which provided up to 4 [[Extended Memory Interconnect|XMI]] buses, and also up to 6 [[VAX Bus Interconnect|VAXBI]] b All could be configured with two 2GB memory boards, but in this case only 3.5GB would actually be used by [[OpenVMS]] (
    2 KB (297 words) - 00:42, 7 May 2024
  • ...t [[word]]s, and almost identical [[instruction set]]s; Honeywell added an Extended Instruction Set (EIS) which provided string-manipulation instructions, [[bi ...pending Unit' (APU) - needed to implement the [[segment]]ed [[single-level memory]] used by Multics, which ran only on those models of the GE 600 and Honeywe
    12 KB (1,837 words) - 19:24, 3 January 2024
  • | virtual address = 13 bits (direct), 15 bits (extended) | memory speed = 1 μsec (9) or 1.5 μsec (9/L)
    6 KB (801 words) - 22:14, 9 February 2024
  • During 1962 and 1963, the system was improved and extended, and finally entered full service in the summer of 1963. [[Project MAC]] ac * memory boundary and relocation registers
    6 KB (1,011 words) - 16:53, 7 March 2024
  • Extended single height boards: Extended double height boards:
    5 KB (717 words) - 01:33, 1 March 2023
  • ...he [[PDP-11 Extended Instruction Set|EIS]] was optional, with the [[KE11-E Extended Instruction Set]], a hex card. There was also optional [[floating point]] h ...-D Memory Management]], another hex card; it too was not the full [[PDP-11 Memory Management]], but the simplified subset. Other CPU options included the [[K
    4 KB (588 words) - 05:52, 8 April 2024
  • ...]'s ([[PDP-11/34]] through [[PDP-11/45]]) to have up to 4 MBytes of [[main memory]]. ...ess]]es on a separate [[Extended UNIBUS]]; the latter could hold stock EUB memory cards, up to the 4MB standard on the EUB.
    9 KB (1,569 words) - 15:47, 6 February 2024
  • | physical address = 15 bits (with Memory Extension Control; 32K words) | virtual address = 12 bits (direct), 15 bits (extended)
    2 KB (360 words) - 20:03, 7 February 2024
  • ...ssages ('signals'), asynchronous I/O, and allocation and freeing of [[main memory]]; it had no [[file system]] or other support for [[secondary storage]]. All were somewhat extended from the original; the first two fairly extensively, the latter only to mak
    3 KB (394 words) - 16:36, 25 January 2024
  • ...th use [[Direct Memory Access|DMA]] to transfer information between [[main memory]] and the floppy. | Error || Initialize || colspan=2 | Extended Address || RX02 || colspan=2 | Unused || Density || Transfer Request || Int
    4 KB (536 words) - 15:06, 6 November 2022
  • ...which plugged into a common [[backplane]], along with four PCBs for [[main memory]] (in a 64KW [[address space]] of 16-bit [[word]]s), and those for [[device ...nd eventually also 1KW of writeable [[Random Access Memory|RAM]] microcode memory. (The basic ROM microcode more or less emulated a [[Data General]] [[Nova]]
    6 KB (863 words) - 22:39, 3 October 2023
  • The '''KE11-E Extended Instruction Set''' is the optional [[PDP-11 Extended Instruction Set]] for the [[KD11-A CPU]] of the [[PDP-11/40]]; it implement The KE11-E includes its own microcode [[Read-only memory|ROM]], which produces an additional 24 bits width of microcode (to control
    2 KB (304 words) - 02:33, 12 October 2022
  • ...[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses. Full [[PDP-11 Memory Management]] and a [[cache]] (the [[KK11-B Cache Memory|KK11-B]]) were standard on all KD11-Z's. It also supported the optional [[F
    4 KB (668 words) - 15:59, 6 February 2024
  • '''MS11''' refers to a number of different [[semiconductor]] [[main memory]] systems for [[UNIBUS]] [[PDP-11]]s: * MS11-A, -B and -C [[MS11 Semiconductor Memory System]]s
    707 bytes (111 words) - 21:10, 2 July 2023
  • ...UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package|DIP]] switches. It used The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[memory refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum
    2 KB (346 words) - 21:15, 21 September 2022
  • The '''MM11-E''' and '''MM11-F core memories''' were [[UNIBUS]] [[main memory]] units; the first UNIBUS memories produced by [[Digital Equipment Corporat ...[[parity]] version available, the '''MM11-FP''' (which used a 4Kx18 [[core memory|core plane]], instead of the 4Kx16 used in the MM11-E and MM11-F).
    4 KB (667 words) - 19:53, 30 July 2023
  • ...ded UNIBUS]] [[Metal Oxide Semiconductor|MOS]] [[Dynamic RAM|DRAM]] [[main memory]] card. As an EUB card, it can therefore ''only'' be plugged into the EUB s ...system is frozen (via negation of the ACLO UNIBUS signal) while the entire memory is cleared, to prevent spurious ECC errors. For [[diagnostic]] purposes, th
    2 KB (345 words) - 17:10, 18 August 2023
  • | memory speed = 2.3 µseconds | memory mgmt = bank selection, CPU mode
    2 KB (332 words) - 14:11, 14 July 2023
  • | memory speed = 1.6 µseconds | memory mgmt = none
    2 KB (298 words) - 14:11, 14 July 2023
  • | memory speed = 1 µsecond ([[cycle time]]) | memory mgmt = [[base and bounds]]
    6 KB (789 words) - 17:26, 22 January 2024
  • ...card; it can theoretically be configured as either [[UNIBUS]] memory, or [[Extended UNIBUS]]. In actuality, the MS11-M uses power [[voltage]]s of +12V/-12V, un ...ia negation of the ACLO UNIBUS signal) for up to 451 msec while the entire memory is cleared, to prevent spurious ECC errors. For [[diagnostic]] purposes, th
    3 KB (473 words) - 20:02, 30 July 2023
  • '''Extended UNIBUS memory''' [[main memory]] cards for the [[Extended UNIBUS]] were available from [[Digital Equipment Corporation|DEC]] and from All DEC EUB memory used [[Dynamic RAM|DRAM]]s, and some used [[Error-correcting code|ECC]] to
    694 bytes (101 words) - 15:54, 6 February 2024
  • ...rchitecture]] of the later chips, including hardware support for [[virtual memory]]. ...that architecture allows them to switch into protected mode, where all the extended features of the later architecture are available.
    1 KB (185 words) - 16:06, 15 March 2021
  • ...chitecture]]s of the later chips, including hardware support for [[virtual memory]], is apparently (to the program) ''not'' present. ...architecture allows them to switch into [[protected mode]], where all the extended features of the later architectures are available. Real mode in the later x
    3 KB (536 words) - 16:57, 19 January 2023
  • ...ta path]] chip, a control chip, and two or three [[microcode]] [[Read-only memory|ROMs]] (each holding 512 microwords, which are 22 bits wide). (The microcod ...ction Set|EIS]]/[[FIS floating point|FIS]] [[instruction]]s; the [[KEV11-B Extended Instruction Set|KEV11-B]] provides EIS without FIS; the [[KEV11-C Commercia
    5 KB (773 words) - 22:42, 20 December 2023
  • ...20]]). In that role, it was used to hold extra [[core memory|core]] [[main memory]] systems (each in their own custom system unit) and other devices, and had ...form factor|hex]] cards, only quads, plus a single [[DEC card form factor|extended length]] card.
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  • ...ect Memory Access|DMA]] to transfer data to and from [[buffer]]s in [[main memory]]. They have an on-board [[First-In First-Out buffer|FIFO]] buffer which ca ...the NI1010A, at the cost of not being able to use more than 256KB of main memory.
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  • ...[[microcode|micro-programmed]] processor (making heavy use of [[Read-only memory#PROM|PROMs]]). It was contained on single [[DEC card form factor|hex]] [[pr ...[memory management]] of any kind, or hardware [[floating point]], [[PDP-11 Extended Instruction Set|EIS]] [[instruction]]s, or the various instructions added t
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  • ** [[KT11-D Memory Management|KT11-D]], [[KE11-E Extended Instruction Set|KE11-E]]/[[KE11-F Floating Instruction Set|KE11-F]] There is also reportedly an overlay for the [[KE11-A Extended Arithmetic Element‎]], but although several KE11-A documents refer to it,
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  • ...nt|subset PDP-11 memory management]], and used a [[UNIBUS]] for its [[main memory]] access (although a built-in [[cache]] was standard). ...ailable were either a User Control Store (1KW of read-write microcode), an Extended Control Store ([[ROM]] microcode), or a Diagnostic Control Store.
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  • ...rdware can be expected to implement. It was officially followed by IBM's [[Extended Graphics Array]] (XGA) standard, but was effectively superseded by numerous *256&nbsp;[[kilobyte|KB]] Video [[Random-access memory|RAM]] (The very first cards could be ordered with 64&nbsp;KB or 128&nbsp;KB
    11 KB (1,681 words) - 12:41, 27 February 2024
  • ...The entry-level version of the 5150 came with just 16 KB of random-access memory (RAM), which was sufficient to run Cassette BASIC. However, Cassette BASIC ...purpose of Disk BASIC was as a "lite" version for IBM PCs with only 48K of memory: BASIC.COM would then have about 23K free for user code, whereas BASICA wou
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  • ...line]] as a operating console. There are commands to read and write [[main memory]], [[register]]s in the CPU, start the CPU, etc. The [[LSI-11 CPUs]], using the [[LSI-11 chip set]], have an extended ODT [[syntax]] with extra commands:
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  • ...ing on the operand modes, PDP-11 instructions could add up to 6 additional memory cycles per instruction, above the 1 needed to [[fetch]] the basic instructi ...that ODT will not function correctly in the LSI-11s unless there is [[main memory]] on the [[QBUS]] (at location 0). The reason for this restriction is unkno
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  • ...64Kx1 DRAM [[integrated circuit|chips]], later ones use 256Kx1 DRAMs. The memory is arranged as 8 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, wit | ''Parity Error'' || Extended Error Address Enable || colspan=2 | Reserved || colspan=7 | ''Error Address
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  • ...the [[PDP-11/24]] which provided a full path between its [[UNIBUS]] and [[Extended UNIBUS]] (EUB) via a [[UNIBUS map]]. It also provided a number of other fac ...ocks of UNIBUS [[address space]] to any location within the 4 Mbyte [[main memory]] [[address space]]. A pair of [[jumper]] sets could limit the range of UNI
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  • ...of 16-[[bit]] parallel ports, one input, and one output; it uses [[Direct Memory Access|DMA]] to transfer data. * NEX - Nonexistent Memory; also write-to-zero
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  • ...t [[QBUS]]/[[Private Memory Interconnect|PMI]] [[Dynamic RAM|DRAM]] [[main memory]] card. ...yte when fully populated with 256K DRAM [[integrated circuit|chips]]. The memory is arranged as 2 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, wit
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  • ...[[DEC card form factor|dual]]-height [[QBUS]] [[Dynamic RAM|DRAM]] [[main memory]] card. The MSV11-MB (M7506-BA) holds 1 MByte when fully populated with 256 The memory is arranged as 2 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, wit
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  • ...[[QBUS]] [[DEC card form factor|dual]]-height [[Dynamic RAM|DRAM]] [[main memory]] card ('''M8059'''). It can be configured as either a [[QBUS#Variable addr The memory is arranged as 2 banks, each 16 data bits (one [[PDP-11]] [[word]]) wide. T
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  • ...[[DEC card form factor|quad]]-height [[QBUS]] [[Dynamic RAM|DRAM]] [[main memory]] card. The MSV11-PL (M8067-Lx) holds 512 KBytes when fully populated with The memory is arranged as 2 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, wit
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  • ...of 16-[[bit]] parallel ports, one input, and one output. It uses [[Direct Memory Access|DMA]] to transfer data; it is a [[QBUS#Variable address size|Q22]] d * NEX - Nonexistent Memory; also write-to-zero
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  • | style="padding: 0 1em 0;" | DEC 4000 memory 16MB [[#ref_6|[6]]] | style="padding: 0 1em 0;" | DEC 4000 memory 32MB [[#ref_5|[5]]]
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  • ...trol, depending on the cabling option chosen (below). Output used [[Direct Memory Access|DMA]] (with each line having its own [[buffer]] [[pointer]] and coun * the DHV11 includes several [[microprocessor]]s, and has extended capabilities, including a [[diagnostic]] self-test, and [[hardware]] in-ban
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  • ...on models of the [[PDP-11]] such as the [[PDP-11/05]] which did not have [[memory management]] (which was required for early Unix versions from [[UNIX Fourth ..., with the kernel in low memory, and the processes (one at a time) in high memory.
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  • ...also included. It was targeted to systems with a minimal amount of [[main memory]], as little as 40KB (a real concern for LSX, on early LSI-11s, which usual ..., with the kernel in low memory, and the processes (one at a time) in high memory.
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  • ...l line interface|RS-232]] [[asynchronous serial line]]s, and used [[Direct Memory Access|DMA]] on the output side. * the DHU11 includes several [[microprocessor]]s, and has extended capabilities, including a [[diagnostic]] self-test, and [[flow control]] su
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  • | physical address = 15 bits (32K words - requires Type 16 Memory Extension Control) | memory speed = 2 μsec ([[access time]])<br>8 μsec (read/write [[cycle time]])
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  • ...switching]] to allow more than one PDP-8 [[address space]] worth of [[main memory]] to be installed and used. Although the implementation of the various unit ...ory. The Memory Extension units allow the use of multiple 'fields' of main memory, the exact number depending on the model:
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  • | 6602 || RLMA || Load memory address register |Memory Address Register || MA
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  • The ''' DQ11''' is the earliest [[Direct Memory Access|DMA]] [[synchronous serial line]] [[peripheral|interface]] for the [ * MXEET - Memory Extension or Enter/Exit T
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  • ...MM8-E was the first [[PDP-8 family]] core memory system to use the [[core memory#Technical details|shared sense/inhibit line]] technical innovation. The ini * Memory Stack Assembly H211/H220 (4K); H212 (8K)
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  • The '''KK11-B Cache Memory''' was a standard part of the [[KD11-Z CPU]] of the [[PDP-11/44]], a high-s ...there was only one possible cache entry in which any given word of [[main memory]] could be found), with write-through, and a block size of one [[word]].
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  • ...]] model of the PDP-11: "it depends on what hardware is present ([[KE11-A Extended Arithmetic Element|EAE]], [[FP11-B Floating-Point Processor|floating-point ...nknown; as late as V3, there were apparently still UNIX machines without [[memory management]] hardware: "The purpose of this command is to simplify the prep
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  • ...rotect & Relocate" [[memory management]] option for the -11/20, the [[KS11 Memory Protection and Relocation option|KS11]]. Some of the -11/20's running V2 UN ...at a higher address (since on the PDP-11, [[interrupt vector]]s are in low memory), as on [[MINI-UNIX#Implementation_details|MINI-UNIX]]; but again, neither
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  • ...ended UNIBUS]] used between the [[Central Processing Unit|CPU]] and [[main memory]]; others are part of the connection between the CPU and the optional [[UNI [[Category: Extended UNIBUS]]
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  • * [[CIXCD]] - [[Extended Memory Interconnect|XMI]] CI Interface
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  • * [[MS630]] 16 MB Memory %SYSGEN-I-EXTENDED, DISK$MICROVMS:[SYS0.SYSEXE]PAGEFILE.SYS;1 extended
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  • ..., the '''H-100''', was released in 1978. In the early 1980s, the H series extended into the [[supermini]] segment. One of the last models was the '''H-1600'' ...S'''&mdash;''Disc Monitor System''. The Harris machines ran the [[virtual memory]] [[operating system]] '''VULCAN'''&mdash;''Virtual Core Management Operati
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  • 5.3 MS780A - MOS Memory (4KB Array) 5.4 MS780C - MOS Memory (16KB Array)
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  • using 132 buffers containing 1081344 bytes of memory using 217 buffers containing 1777664 bytes of memory
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  • * [[KFMSA]] [[Extended Memory Interconnect|XMI]] Dual DSSI Adapter * [[KFESA]] [[Extended Industry Standard Architecture|EISA]] DSSI Adapter
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  • The '''Extended Memory Interconnect''' (usually given as the acronym: '''XMI''') was a [[bus]] int ...cessor]]. The bus has special capabilities to support the shared access to memory required by such a system.
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  • | [[CPU/Memory Interconnect]] | Memory Box
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  • #Redirect [[Extended Memory Interconnect]]
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  • ...and must have at least 3MB memory. Diskless machines require at least 4MB memory. ; - 16 MB memory
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  • ** [[KDM70]] ([[Extended Memory Interconnect|XMI]])
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  • ...device controller]] for the CR04 [[punched card]] reader. It used [[Direct Memory Access|DMA]] to transfer data. ...(Of those, the M783, M784, M796, M7821 and M957 are [[DEC card form factor|extended length]]; most of the others are all standard length.) <!-- The M239 is use
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  • ...[PDP-11/20]]. (Starting with the next [[PDP-11]] model, the [[PDP-11/45]], memory management was standard, so the KS11 became obsolete.) It was almost certai ...one of the first ones built; certainly the first one used with a [[KE11-A Extended Arithmetic Element|KE11-A]].) A very early [[assembly language]] version of
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  • * an installation script that uses the extended filesystem, which supports long filenames and symbolic links just like the * System V-style shared memory and interprocess communication,
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  • ...ocode|control memory]] contents. The control memory is a read-only [[core memory]] which consists of 64 ''process words'' (i.e. microwords) of 36 bits each. [[Image:PDP-9_microcode_listing.png|left|PDP-9 control memory listing.]]
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  • ...s run in [[Writable Control Store|WCS]] or system console, not in VAX main memory. They do not use the VAX/DS. ** Memory tests
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  • They are equipped with 512 KB memory and a bit-mapped video controller (960 x 240 pixels) ..., up to one MB of memory can be added in increments of 256 KB. Each 256 KB memory option occupies one option slot.
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  • .... Model 60's Micro Channel architecture, fast 80286 microprocessor and 1Mb memory are the right combination to cut through big processing jobs in a hurry. An 1Mb user memory (expandable to 15Mb with memory expansion options) supplies workspace for advanced applications — even mu
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  • ...e [[Central Processing Unit|CPU]] (which he called the 'mill'), and [[main memory]] (the 'store'). In later versions of the Analytical Engine, he made use of ...cted material from a large number of Babbage's publications, along with an extended introduction
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  • .... It was a [[parallel]] computer, with a 16-bit [[word]] length (since the memory it was to test was for Whirlwind, which was that size); it was similar in m It first ran in March, 1953; the prototype core memory was installed and operational by the end of May. Later, the MTC was used to
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  • ...{VerticalTextUp|UNIBUS Interface (UBI)}} || rowspan="3" | {{VerticalTextUp|Memory Interconnect (MIC)}} || rowspan="3" | {{VerticalTextUp|Data Path Module (DP ...="text-align:center;" | UNIBUS || colspan="9" style="text-align:center;" | Memory || colspan="10" style="text-align:center;" | CPU
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  • ...Memory Option]]. The DR780 was implemented on four [[DEC card form factor|extended hex]] cards, which mounted in a custom 6-slot [[backplane]] ([[DEC part num
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  • ...emory Option]].-->The DR780 was implemented on four [[DEC card form factor|extended hex]] cards, which mounted in a custom 6-slot [[backplane]] ([[DEC part num
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