Difference between revisions of "FP11-B Floating-Point Processor"
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| − | The '''FP11-B''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (KB11-A and KB11-B CPU variants thereof, respectively); it was the progenitor of the semi-standard [[FP11 floating point]] used in many [[PDP-11]]s. | + | The '''FP11-B''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers ([[KB11-A CPU|KB11-A]] and [[KB11-B CPU|KB11-B]] [[Central Processing Unit|CPU]] variants thereof, respectively); it was the progenitor of the semi-standard [[FP11 floating point]] used in many [[PDP-11]]s. |
| − | It operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the later [[FP11-C Floating-Point Processor]] for these machines, it ran entirely | + | It operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the later [[FP11-C Floating-Point Processor]] for these machines, it ran entirely [[asynchronous]]ly to the main CPU, and used a clock which was not synchronized to the basic CPU's clock. |
==Implementation== | ==Implementation== | ||
Revision as of 15:20, 13 May 2018
The FP11-B was a FPP used in the PDP-11/45 and PDP-11/70 computers (KB11-A and KB11-B CPU variants thereof, respectively); it was the progenitor of the semi-standard FP11 floating point used in many PDP-11s.
It operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the later FP11-C Floating-Point Processor for these machines, it ran entirely asynchronously to the main CPU, and used a clock which was not synchronized to the basic CPU's clock.
Implementation
It plugged into special pre-wired slots in the CPU's backplane, and included the following boards:
- M8112 ROM and ROM Control
- M8113 Exponent and Data Path
- M8114 Fraction Data Path - High Order
- M8115 Fraction Data Path - Low Order
| v • d • e PDP-11 Computers and Peripherals |
|---|
| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
| UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11 Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11 CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150 CTI PDP-11s - PRO-325 • PRO-350 • PRO-380 Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences |
