Difference between revisions of "KTF11-A memory management chip"

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(Correct supposition on float registers in MMU chip)
(simplified subset only)
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The '''KTF11-A memory management chip''' is an optional chip for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It implemented the standard [[PDP-11 Memory Management]].
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The '''KTF11-A memory management chip''' is an optional chip for [[KDF11 CPUs|PDP-11 CPUs]] which use the [[F-11 chip set]]. It implemented the standard [[PDP-11 Memory Management]] (but only the [[PDP-11 Memory Management#Simplified subset|simplified subset]]).
  
 
The [[KEF11-A floating point]] chip option requires the KTF11-A, since the [[floating point]] [[register]]s are actually in the KTF11-A (the reason is unknown; the KEF11-A is [[microcode]], but there are enough pins for both the [[data bus]], and the microcode bus).
 
The [[KEF11-A floating point]] chip option requires the KTF11-A, since the [[floating point]] [[register]]s are actually in the KTF11-A (the reason is unknown; the KEF11-A is [[microcode]], but there are enough pins for both the [[data bus]], and the microcode bus).

Revision as of 00:08, 29 January 2020

The KTF11-A memory management chip is an optional chip for PDP-11 CPUs which use the F-11 chip set. It implemented the standard PDP-11 Memory Management (but only the simplified subset).

The KEF11-A floating point chip option requires the KTF11-A, since the floating point registers are actually in the KTF11-A (the reason is unknown; the KEF11-A is microcode, but there are enough pins for both the data bus, and the microcode bus).

The KTF11-A chip was the DC304, DEC part # 21-15542-0n (where n is a digit giving the revision; 0 and 1 have been seen).