PDP-11/60

From Computer History Wiki
Revision as of 03:20, 24 February 2019 by Jnc (talk | contribs) (Add text, image)
Jump to: navigation, search
PDP-11/60

The PDP-11/60 was, in its day, a rather unsuccessful model of DEC's PDP-11 line; although considerable more complex than the PDP-11/34, it did not have significant capability advantages over it.

It had the same limited memory management, without so-called 'I+D separatation', which therefore limited the size of the applications which could run on it; it also supported only the UNIBUS, which normally limited it to 248KB of main memory.

It is of interest now since it had loadable microcode as a standard; it is a very rare machine, though, since its lack of commercial success meant very few were produced.

hampage.hu

Front console of a PDP-11/60
Quote:

1977. The /60 was an expensive "middle-class" machine, intended as the successor of the /40. It should have been introduced after the /70, but was delayed at least 12-18 months due design and debugging problems. It had a writable control store (WCS) for custom instructions, and floating point instructions were implemented in the CPU microcode. It also had 18-bit memory management. With the FPP option it had the best floating point performance among the -11's. As for packaging, it came in the "low boy/high boy" cabinets, the one pictured to the left is the "high" one. The storage devices could be placed in the upper region, the card cage itself was in the lower half.