PDP-11 stacks

Almost all PDP-11 models have some form of stack limitation, which causes a CPU trap when the stack overflows. The details of the mechanism vary from model to model, to the point that there are almost no 'families' of stack limitation mechanism.

Red/Yellow Zones

The first model with the most complex stack limitation mechanism was the KB11-A CPU of the PDP-11/45. It had a 'two-zone' scheme: the 'Yellow Zone' is a 16-word grace area, in which operations (instructions, and probably also interrupts) were allowed, but result in a trap after the operation is completed; in the 'Red Zone', all operations are prohibited, and result in an immediate trap.

When Red Zone violations occur, the Stack Pointer is set to 4; the previous PC and PS are then saved in locations 0 and 2 by the resulting trap. (Odd stack addresses, and use of non-existent memory, result in identical handling.)

The address of the stack limit can be set with the Stack Limit Register register in the CPU. It is a word register (at 0777774), but the bottom byte is unused; it is cleared by a reset (e.g. when starting the CPU). The Red Zone runs up through the address given there plus 0337; the Yellow Zone starts at 0340, and runs up through 0377.

The KB11-B CPU of the PDP-11/70 has exact same mechanism. The KD11-A CPU of the PDP-11/40 has stack limitation as above, but at a fixed address of 0400; a similar Stack Limit Register is an option, the KJ11-A Stack Limit Register. When present, it functions identically to the other two.