LSI-11 chip set

The LSI-11 chip set CPU chip set is used in the LSI-11 CPUs - the original LSI-11, and the later LSI-11/2.

It is the Western Digital WD16/CP1600 (alternative designations); Western Digital later turned this into a product which was used in other systems.

Chips

The chip set consists of a data path chip, a control chip, and two or three microcode ROMs (each holding 512 microwords, which are 22 bits wide). (The microcode is thus more 'vertical' than 'horizontal'.)

The data path chip contains data paths, registers, and logic to perform micro-instructions. The control chip contains micro-instruction sequencing, and control for the QBUS.

The uROMs all have the same pinout, and are wired in parallel, so they can be placed in any of the three uROM positions. The first two uROMs contain the basic PDP-11 instruction set; the third uROM is optional, and a number of different choices are available.

One is the KEV11-A, for the EIS/FIS instructions; the KEV11-B provides EIS without FIS; the KEV11-C provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS).

Some versions of the CPU boards also support the optional KUV11 Writeable Control Store.

Internal details

The data path chip includes a register file and the ALU; all are 8 bits wide (so PDP-11 word operations two microcycles). The register file contains 26 entries (paired into 16-bit composites).

5 pairs are directly addressable from the microcode, 6 pairs an only be addressed indirectly (via a 3-bit internal register, loadable from the register fields ), and 2 pairs support both:

Registers	Directly	Indirectly	Use
0-1		x	R0
2-3		x	R1
4-5		x	R2
6-7		x	R3
10-11		x	R4
12-13		x	R5
14-15	x	x	R6 (SP)
16-17	x	x	R7 (PC)
20-21	x		IR
22-23	x		BAR
24-25	x		Source
26-27	x		Destination
30-31	x		PS

The chip also contains condition codes logic, and a data port which gives access to the QBUS' data/address lines.

The control chip contains control for the data port; it includes a 'programmable translation array', which decodes macro-instructions to produce microcode addresses, the 11-bit 'location counter' (micro-program counter), the 'return register' (microcode subroutine return), and interrupt logic.

Chip variants

There are a number of variants of all the various uROM chips in the base set; it is not known if all variants are completely inter-operable (i.e. any revision of any chip can be replaced with any other, and have the machine still work), so combinations will be listed.

Chip numbers of the form 23-xxxxx-rr, etc are DEC part numbers (where 'rr' seems to represent a revision number - 0, if not given); the corresponding Western Digital numbers are xxxxy, etc (where the 'x's are digits, and the 'y' a letter).

The Data Path chip is a 1611H (various DEC part numbers), and the Control chip is a 2007C (ditto); the uROM chips are all 30xxy.

The following sets (Data, Control, uROMs) have been observed (the first three on LSI-11/2 cards):

• 1611H 21-11549-01, 2007C 23-002C4, 3010A 23-001B5, 3007D 23-002B5
• 1611H 21-16890, 2007C 23-002C4, 3010D 23-001B5, 3007D 23-007B5
• 1611H 21-16890, 2007C 23-003C4, 3010D 23-008B5, 3007D 23-007B5
• unknown, unknown, 3010D 23-001B5, 3007D 23-002B5

The 3010D contains uROM addresses 0x000-0x1ff, and the 3007D 23-002B5 contains 0x200-0x3ff.

External links

• Mark J. Sebern, A Minicomputer-Compatible Microcomputer System: The DEC LSI-11, in C. Gordon Bell, J. Craig Mudge, John. E. McNamara, Computer Engineering: A DEC View of Hardware Systems Design, Digital Press, Bedford, 1978
• LSI-11 Processors
• Microcode disassembler
• WikiChip LSI-11
• Western Digital WD9000 Pascal Microengine Microcode