F-11 chip set

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The F-11 chip set (code-named 'Fonz') was DEC's second microprocessor implementation of the PDP-11 architecture. It was used in the KDF11 CPUs.

Unlike the first (the LSI-11), the set implemented the full PDP-11 architecture, including the the KTJ11-A memory management chip which implemented standard PDP-11 Memory Management, and the KEF11-A floating point chip which implemented the FP11-compatible floating point. There is also a 6-chip carrier implementing the PDP-11 Commercial Instruction Set (CIS).

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