Difference between revisions of "MS11-L MOS memory"
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| − | The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor|MOS]] [[Dynamic RAM|DRAM]] [[integrated circuit|chips]] to fill the entire UNIBUS [[address space]]. | + | The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor|MOS]] [[Dynamic RAM|DRAM]] [[integrated circuit|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. |
Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB. All versions include on-board [[parity]] support. | Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB. All versions include on-board [[parity]] support. | ||
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The access time is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the cycle time is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); cycle time is 14.5 μsec (typical), 13.5 μsec (minimum). | The access time is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the cycle time is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); cycle time is 14.5 μsec (typical), 13.5 μsec (minimum). | ||
| − | The board has provision to use battery backup power to retain data during a power outage. Configuation is by [[Dual Inline Package|DIP]] switches | + | The board has provision to use battery backup power to retain data during a power outage. Configuation is by [[Dual Inline Package|DIP]] switches. |
{{PDP-11}} | {{PDP-11}} | ||
[[Category: UNIBUS Memories]] | [[Category: UNIBUS Memories]] | ||
Revision as of 21:28, 22 May 2018
The MS11-L was final UNIBUS main memory from DEC; a single card can hold enough MOS DRAM chips to fill the entire UNIBUS address space. It had a jumper option to enable use on an Extended UNIBUS.
Fully populated with 16Kx1 chips, it is known as the MS11-LD, and holds 256K bytes. The quarter-, half- and three-quarter-populated versions are the MS11-LA, -LB and -LC, respectively; with 64KB, 128KB and 192KB. All versions include on-board parity support.
It plugs into a MUD backplane (only; not SPC). It is a single hex card, the M7891, so it cannot go in the end slots of the backplane.
The access time is 385 nsec (typical; 1025 nsec maximum on refresh conflict), and the cycle time is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); cycle time is 14.5 μsec (typical), 13.5 μsec (minimum).
The board has provision to use battery backup power to retain data during a power outage. Configuation is by DIP switches.
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