Difference between revisions of "MS11 32KB MOS memory"
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There are [[parity]] versions of each; the '''MS11-EP''', '''-FP''', '''-HP''' and '''-JP'''; to have the parity operate, these require an [[M7850 parity controller]] in the same backplane as the memory card. The M7847 is a [[DEC card form factor|hex]] card, so it cannot go in the end slots of the backplane. | There are [[parity]] versions of each; the '''MS11-EP''', '''-FP''', '''-HP''' and '''-JP'''; to have the parity operate, these require an [[M7850 parity controller]] in the same backplane as the memory card. The M7847 is a [[DEC card form factor|hex]] card, so it cannot go in the end slots of the backplane. | ||
| − | The access time is 550 nsec (1250 nsec maximum on [[refresh]] conflict), and the cycle time is 700 nsec (1400 nsec maximum on refresh conflict). Refresh cycle time is 25 μsec (typical), 22.5 μsec (minimum). | + | The [[access time]] is 550 nsec (1250 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 700 nsec (1400 nsec maximum on refresh conflict). Refresh cycle time is 25 μsec (typical), 22.5 μsec (minimum). |
The board has provision to use battery backup power to retain data during a power outage. Configuation is by [[Dual Inline Package|DIP]] switches; the first DEC memory to do so. | The board has provision to use battery backup power to retain data during a power outage. Configuation is by [[Dual Inline Package|DIP]] switches; the first DEC memory to do so. | ||
Revision as of 14:54, 14 July 2018
The MS11-E, MS11-F, MS11-H and MS11-J are the different configurations of DEC's first commodity MOS UNIBUS memory card, the M7847. They plug into a MUD backplane (only; not SPC).
Fully populated with 4Kx1 DRAM chips, it is known as the MS11-J, and holds 32K bytes. The quarter-, half- and three-quarter-populated versions are the MS11-E, -F and -H, respectively; with 8KB, 16KB and 24KB. (The '-G' is almost certainly not part of the sequence since 'G' is not in the DEC alphabet.)
There are parity versions of each; the MS11-EP, -FP, -HP and -JP; to have the parity operate, these require an M7850 parity controller in the same backplane as the memory card. The M7847 is a hex card, so it cannot go in the end slots of the backplane.
The access time is 550 nsec (1250 nsec maximum on refresh conflict), and the cycle time is 700 nsec (1400 nsec maximum on refresh conflict). Refresh cycle time is 25 μsec (typical), 22.5 μsec (minimum).
The board has provision to use battery backup power to retain data during a power outage. Configuation is by DIP switches; the first DEC memory to do so.
| v • d • e PDP-11 Computers and Peripherals |
|---|
| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
| UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11 Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11 CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150 CTI PDP-11s - PRO-325 • PRO-350 • PRO-380 Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences |
