Difference between revisions of "MSV11-R memory module"
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				 (Note definitely PMI; +warning)  | 
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[[Image:MSV11-R.jpg|thumb|250px|right|MSV11-R card]]  | [[Image:MSV11-R.jpg|thumb|250px|right|MSV11-R card]]  | ||
| − | The '''MSV11-R''' (M7458) is a [[DEC card form factor|quad]]-height [[QBUS]] [[Dynamic RAM|DRAM]] [[main memory]] card.   | + | The '''MSV11-R''' (M7458) is a [[DEC card form factor|quad]]-height [[QBUS]]/[[Private Memory Interconnect|PMI]] [[Dynamic RAM|DRAM]] [[main memory]] card.  | 
| − | The memory is arranged as 2 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, with 2 additional bits for [[parity]] (1 per [[byte]]). It is a [[QBUS#Variable address size|Q22  | + | '''''NOTE:''''' As a PMI card, it uses the [[CD interconnect]]; it can therefore ''only'' be plugged into a [[QBUS#Backplanes|Q/CD backplane]]. Plugging an MSV11-R card into a regular [[QBUS#Backplanes|Q/Q backplane]] will '''damage''' the MSV11-R.  | 
| + | |||
| + | The MSV111-RA (M7358-A) holds 1 MByte when fully populated with 256K DRAMs  [[integrated circuit|chips]].<!--, or 512 Kbytes when half-populated (the only partially-filled configuration allowed). --> The memory is arranged as 2 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, with 2 additional bits for [[parity]] (1 per [[byte]]). It is a [[QBUS#Variable address size|Q22]] card. <!-- and supports block mode. -->  | ||
==Configuration==  | ==Configuration==  | ||
Revision as of 21:41, 6 May 2020
The MSV11-R (M7458) is a quad-height QBUS/PMI DRAM main memory card.
NOTE: As a PMI card, it uses the CD interconnect; it can therefore only be plugged into a Q/CD backplane. Plugging an MSV11-R card into a regular Q/Q backplane will damage the MSV11-R.
The MSV111-RA (M7358-A) holds 1 MByte when fully populated with 256K DRAMs chips. The memory is arranged as 2 banks, each 16 data bits (1 PDP-11 word) wide, with 2 additional bits for parity (1 per byte). It is a Q22 card.
Configuration
A single 8-position DIP switch configures the card:
- Switches S1-S2 select the 22-bit starting address;
 - Switches S3-S4 must always be OFF;
 - Switches S5-S8 select the CSR address.
 
| S1 | S2 | Staring Address | 
|---|---|---|
| OFF | OFF | 00000000 (0 MB) | 
| OFF | ON | 04000000 (1 MB) | 
| ON | OFF | 10000000 (2 MB) | 
| ON | ON | 14000000 (3 MB) | 
Control Register
Each board has a single control register, which can be configured in the range 17772100-17772136.
| S5 | S6 | S7 | S8 | CSR Address | 
|---|---|---|---|---|
| ON | ON | ON | ON | 17772100 | 
| ON | ON | ON | OFF | 17772102 | 
| ON | ON | OFF | ON | 17772104 | 
| ON | ON | OFF | OFF | 17772106 | 
| ON | OFF | ON | ON | 17772110 | 
| ON | OFF | ON | OFF | 17772112 | 
| ON | OFF | OFF | ON | 17772114 | 
| ON | OFF | OFF | OFF | 17772116 | 
| OFF | ON | ON | ON | 17772120 | 
| OFF | ON | ON | OFF | 17772122 | 
| OFF | ON | OFF | ON | 17772124 | 
| OFF | ON | OFF | OFF | 17772126 | 
| OFF | OFF | ON | ON | 17772130 | 
| OFF | OFF | ON | OFF | 17772132 | 
| OFF | OFF | OFF | ON | 17772134 | 
| OFF | OFF | OFF | OFF | 17772136 | 
Technical information
As far as is known, there are no copies of the engineering drawings extant for the MSV11-R. The following 256K DRAM chips have been observed to be used: MB81256-15 (Fujitsu).
Further reading
- MSV11-R User Guide, EK-MSV1R-UG
 
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|  UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
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