Difference between revisions of "PDP-11/84"

From Computer History Wiki
Jump to: navigation, search
m
m (Missed another /83 image)
 
(24 intermediate revisions by 2 users not shown)
Line 1: Line 1:
[[Image:PDP11-84.JPG|150px|right]]
+
[[Image:PDP11-84.JPG|thumb|right|250px|A PDP-11/84]]
  
I couldn't tell you the first thing about this.
+
The '''PDP-11/84''' is the [[UNIBUS]]-capable twin to the [[QBUS]]-only [[PDP-11/83]]; both used the [[KDJ11-B CPU]] (with its [[Private Memory Interconnect|PMI]] bus). The -11/84 added a [[KTJ11-B UNIBUS adapter]] to provide its UNIBUS, and required a custom main [[backplane]], the [[KDJ11 PMI/UNIBUS backplane]], to support it.
 +
 
 +
== hampage.hu ==
 +
 
 +
Quoting:
 +
<i>
 +
Introduced in 1988. Based on the [[J-11 chip set]], DEC originally wanted the clock speed to be 20MHz, but it couldn't be done on time, so the actual speed was 18MHz. It was the fastest CPU of the PDP-11's anyhow. The high-end configuration had up to 4MB RAM on PMI (Private Memory Interconnect) and a floating-point accelerator.
 +
 
 +
The UNIBUS-based PDP-11/84 was for those customers, who wanted more I/O throughput or had some legacy equipment.
 +
 
 +
The box used was the BA123 which was a popular enclosure for QBUS machines. Apart from the 12x4-slot QBUS backplane, it had five slots for storage units, e.g. room for two or three hard disks, a tape drive ([[TK50]] here) and floppy.
 +
</i>
 +
<!--
 +
<br clear=all>
 +
 
 +
== Gallery ==
 +
-->
 +
==External links==
 +
 
 +
* [http://wwcm.synology.me/pdf/EK-1184A-TM-PR1%20Preliminary%20PDP-11-84%20System%20Installation%20And%20Technical%20Reference%20Manual.pdf Preliminary PDP-11/84 System Technical and Reference Manual] (EK-1184E-TM-PR1)
 +
* [http://www.bitsavers.org/pdf/dec/pdp11/1184/EK-1184E-TM-001_Dec87.pdf PDP-11/84 System Technical and Reference Manual] (EK-1184E-TM-001)
 +
* [http://www.bitsavers.org/pdf/dec/pdp11/1184/EK-1184A-MG-001_1184maint_Nov86.pdf PDP-11/84 System Maintenance Guide] (EK-1184A-MG-001)
 +
* [http://www.bitsavers.org/pdf/dec/pdp11/1184/MP-02015-01_11-84_Maintenance_Print_Set_198412.pdf 11/84 Field Maintenance Print Set] (MP-02015-01)
 +
* [http://bitsavers.org/pdf/dec/pdp11/handbooks/PDP-11_Systems_Handbook_1987.pdf PDP-11 Systems Handbook]
  
 
{{PDP-11}}
 
{{PDP-11}}
[[Category:DEC processors]][[Category:UNIBUS processors]]
+
 
 +
[[Category: UNIBUS PDP-11s]]

Latest revision as of 13:35, 10 October 2024

A PDP-11/84

The PDP-11/84 is the UNIBUS-capable twin to the QBUS-only PDP-11/83; both used the KDJ11-B CPU (with its PMI bus). The -11/84 added a KTJ11-B UNIBUS adapter to provide its UNIBUS, and required a custom main backplane, the KDJ11 PMI/UNIBUS backplane, to support it.

hampage.hu

Quoting: Introduced in 1988. Based on the J-11 chip set, DEC originally wanted the clock speed to be 20MHz, but it couldn't be done on time, so the actual speed was 18MHz. It was the fastest CPU of the PDP-11's anyhow. The high-end configuration had up to 4MB RAM on PMI (Private Memory Interconnect) and a floating-point accelerator.

The UNIBUS-based PDP-11/84 was for those customers, who wanted more I/O throughput or had some legacy equipment.

The box used was the BA123 which was a popular enclosure for QBUS machines. Apart from the 12x4-slot QBUS backplane, it had five slots for storage units, e.g. room for two or three hard disks, a tape drive (TK50 here) and floppy.

External links