Difference between revisions of "Modified UNIBUS Device"
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It differed from the older [[Small Peripheral Controller|SPC]] slot in that it was a hex-height slot, and used the pins (in the [[DEC card form factor#Edge connector contact identification|A-B connectors]]) to carry UNIBUS signals - mostly pin-compatible with the original dual UNIBUS slot, but there were a few important differences. | It differed from the older [[Small Peripheral Controller|SPC]] slot in that it was a hex-height slot, and used the pins (in the [[DEC card form factor#Edge connector contact identification|A-B connectors]]) to carry UNIBUS signals - mostly pin-compatible with the original dual UNIBUS slot, but there were a few important differences. | ||
| − | The most important was that since the standard UNIBUS dual connector only contains one pin per grant (suitable only for an 'in' or 'out' UNIBUS connector), not separate 'grant in' and 'grant out' pins (as on the [[QBUS]]), a full-function UNIBUS slot is not possible with only two connectors. The MUD connectors | + | The most important was that since the standard UNIBUS dual connector only contains one pin per grant (suitable only for an 'in' or 'out' UNIBUS connector), not separate 'grant in' and 'grant out' pins (as on the [[QBUS]]), a full-function UNIBUS slot is not possible with only two connectors. The MUD connectors therefore do not contain grants; those pins were recycled for other functions. |
| − | Some contain a number of lines for communication between a parity controller, and parity-capable memory boards plugged into that backplane; others carry additional voltages (primarily for core memory). | + | Some re-assigned pins contain a number of lines for communication between a parity controller, and parity-capable memory boards plugged into that backplane; others carry additional voltages (primarily for core memory). |
| − | Technically, a MUD slot only describes the A-B connectors; most backplanes also provided SPC functionality in the C-F conectors (needed for signals for interrupts or DMA, for devices which did those), with most UNIBUS signals present in both; the combination is sometimes called MUD/SPC. | + | Technically, a MUD slot only describes the A-B connectors; most backplanes also provided SPC functionality in the C-F conectors (needed for signals for interrupts or DMA, for devices which did those), with most UNIBUS signals present in both; the combination is sometimes called a 'MUD/SPC' slot. |
The [[DD11-C]] (4-slot) and [[DD11-D]] (9-slot) and later backplanes generally provided MUD slots, not the earlier SPC slots; however, generally the slots in these later backplanes are MUD/SPC - other than the entrance and exit slots, which have normal two-slot UNIBUS in/out in A-B. | The [[DD11-C]] (4-slot) and [[DD11-D]] (9-slot) and later backplanes generally provided MUD slots, not the earlier SPC slots; however, generally the slots in these later backplanes are MUD/SPC - other than the entrance and exit slots, which have normal two-slot UNIBUS in/out in A-B. | ||
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MUD/SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx), not the 'pseudo-UNIBUS' rows A/B. | MUD/SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx), not the 'pseudo-UNIBUS' rows A/B. | ||
| − | A board plugged into a MUD slot generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through. The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have a grant continuity card installed. | + | A board plugged into a MUD/SPC slot generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through. |
| + | |||
| + | The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have a grant continuity card installed. | ||
==Added signals== | ==Added signals== | ||
| Line 25: | Line 27: | ||
===Pinout=== | ===Pinout=== | ||
| − | The pins which changed | + | The pins which were added (changed) to create MUD are: |
* AB2 - Test Point | * AB2 - Test Point | ||
| Line 42: | Line 44: | ||
* BE2 - Parity Detect | * BE2 - Parity Detect | ||
* BV2 - -5V (core) | * BV2 - -5V (core) | ||
| + | |||
| + | ==Removed signals== | ||
| + | |||
| + | Since grants could not be supported in the number of pins available in a dual connector, all grant pins were removed, along with some ground pins. | ||
| + | |||
| + | ===Pins=== | ||
| + | |||
| + | The pins which changed function are listed below. (Note that the DEC documentation indicates a number of pins were changed, but which seem to carry the same signal in the MUD connector. Those pins are marked with a '*'.) | ||
| + | |||
| + | * AB1* - INTR | ||
| + | * AB2 - Ground | ||
| + | * AN1 - Ground | ||
| + | * AP1 - Ground | ||
| + | * AP2* - BBSY | ||
| + | * AR1 - Ground | ||
| + | * AR2* - SACK | ||
| + | * AS1 - Ground | ||
| + | * AS2* - NPR | ||
| + | * AT2* - BR7 | ||
| + | * AU1 - NPG | ||
| + | * AU2* - BR6 | ||
| + | * AV1 - BG7 | ||
| + | * AV2 - Ground | ||
| + | * BA1 - BG6 | ||
| + | * BB1 - BG5 | ||
| + | * BB2 - Ground | ||
| + | * BD1 - Ground | ||
| + | * BD2* - BR4 | ||
| + | * BE1 - Ground | ||
| + | * BE2 - BG4 | ||
| + | * BV2 - Ground | ||
{{PDP-11}} | {{PDP-11}} | ||
Revision as of 17:04, 22 July 2016
Modified UNIBUS Device or MUD was DEC's name for an I/O board slot in the backplanes of UNIBUS PDP-11s. It was a hex slot, and could hold any kind of device.
It differed from the older SPC slot in that it was a hex-height slot, and used the pins (in the A-B connectors) to carry UNIBUS signals - mostly pin-compatible with the original dual UNIBUS slot, but there were a few important differences.
The most important was that since the standard UNIBUS dual connector only contains one pin per grant (suitable only for an 'in' or 'out' UNIBUS connector), not separate 'grant in' and 'grant out' pins (as on the QBUS), a full-function UNIBUS slot is not possible with only two connectors. The MUD connectors therefore do not contain grants; those pins were recycled for other functions.
Some re-assigned pins contain a number of lines for communication between a parity controller, and parity-capable memory boards plugged into that backplane; others carry additional voltages (primarily for core memory).
Technically, a MUD slot only describes the A-B connectors; most backplanes also provided SPC functionality in the C-F conectors (needed for signals for interrupts or DMA, for devices which did those), with most UNIBUS signals present in both; the combination is sometimes called a 'MUD/SPC' slot.
The DD11-C (4-slot) and DD11-D (9-slot) and later backplanes generally provided MUD slots, not the earlier SPC slots; however, generally the slots in these later backplanes are MUD/SPC - other than the entrance and exit slots, which have normal two-slot UNIBUS in/out in A-B.
Grants
MUD/SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx), not the 'pseudo-UNIBUS' rows A/B.
A board plugged into a MUD/SPC slot generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through.
The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot. Un-occupied slots needed to have a grant continuity card installed.
Added signals
The added lines for communication between a parity controller and parity-capable memory boards were Parity Detect (used to let memory boards know that a parity controller is present); Internal SSYN (used by memory boards to let the parity controller know that their data is ready); and Parity P0 and Parity P1 (parity data).
The additional voltages were + and -15V, -5V, and +20V.
Pinout
The pins which were added (changed) to create MUD are:
- AB2 - Test Point
- AN1 - Parity P1
- AP1 - Parity P0
- AR1 - -15/12 Battery
- AS1 - -15/12 Battery
- AU1 - +20V (core)
- AV1 - +20V (core)
- AV2 - +20V (core)
- BA1 - Reserved
- BB1 - Reserved
- BB2 - Test Point
- BD1 - +5V Battery
- BE1 - Internal SSYN
- BE2 - Parity Detect
- BV2 - -5V (core)
Removed signals
Since grants could not be supported in the number of pins available in a dual connector, all grant pins were removed, along with some ground pins.
Pins
The pins which changed function are listed below. (Note that the DEC documentation indicates a number of pins were changed, but which seem to carry the same signal in the MUD connector. Those pins are marked with a '*'.)
- AB1* - INTR
- AB2 - Ground
- AN1 - Ground
- AP1 - Ground
- AP2* - BBSY
- AR1 - Ground
- AR2* - SACK
- AS1 - Ground
- AS2* - NPR
- AT2* - BR7
- AU1 - NPG
- AU2* - BR6
- AV1 - BG7
- AV2 - Ground
- BA1 - BG6
- BB1 - BG5
- BB2 - Ground
- BD1 - Ground
- BD2* - BR4
- BE1 - Ground
- BE2 - BG4
- BV2 - Ground
| v • d • e PDP-11 Computers and Peripherals |
|---|
| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
| UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11 Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11 CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150 CTI PDP-11s - PRO-325 • PRO-350 • PRO-380 Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences |
