PDP-11/24

The PDP-11/24 was the last low-end UNIBUS PDP-11 system. It used the same 'Fonz' chip-set as the QBUS PDP-11/23; the KDF11-UA CPU of the -11/24 was implemented as a single hex card, the M7133.

Like the earlier PDP-11/44, the -11/24 supported up to 4 Mbytes of main memory, using the Extended UNIBUS between the CPU and memory; all devices were attached to a semi-separate (see below) UNIBUS.

An optional UNIBUS Map provided access to all of memory from UNIBUS DMA devices; without it, the UNIBUS address space was statically mapped across to the low 248 Kbytes of EUB main memory, using a cross-connection path on the CPU card.

UNIBUS Map

The optional UNIBUS Map, the KT24, provided a path between the UNIBUS and the EUB; the KT24 was also implemented as a single hex card, the M7134. A set of 31 mapping register pairs in the KT24 mapped 8 Kbyte blocks of UNIBUS address space to any location within the 4 Mbyte main memory address space.

If no KT24 was present, the CPU detected its absence (a pull-up on the CPU board is attached to pin FE1, "UB to MA VIA UBMAP", and used to generate "UB to MA", which is the cross-connection enable signal), and turned on a set of drivers which gated the UNIBUS address through to the EUB.

System bus structure

As mentioned, the -11/24 used an EUB for the bus between the memory and the CPU, and the UNIBUS for the bus between the CPU and devices. The two busses were not entirely separated; they shared a set of data lines, with each bus having a separate set of address lines.

Either the CPU, or the optional KT24, provided a path from the UNIBUS to the EUB for DMA access to main memory by devices.

The top 256 Kbtes of the CPU's address space were devoted to the UNIBUS; the top 8 Kbytes of that were, as usual, the peripheral page.

Implementation

The -11/24 used a custom 9-slot backplane; slot 1 was for the CPU, slot 2 could hold either memory or the UNIBUS map; slots 3-6 could hold either memory or SPC devices. Slots 7-8 were ordinary MUD/SPC slots, and slot 9 was an ordinary SPC/UNIBUS Out slot.

The EUB and UNIBUS address lines were kept totally separate in all the slots which supported the EUB (1-6); the 22-bit EUB address bus is carried on the EUB address lines (on connectors A-B), and the 18-bit UNIBUS addresses are carried on the SPC address pins (on connector E). (The lower address lines are not shared, as the UNIBUS map provides arbitrary mapping from UNIBUS addresses to main memory addresses.)

The data lines seem to have been cross-connected between the EUB and SPC/UNIBUS. That is because EUB memory boards pick up the data lines on connector A, whereas SPC devices get them on connector C - and the memory/SPC slots can hold either. In fact, the CPU board connects to the data bus on the C connector, i.e. the UNIBUS/SPC pins. The KT24, contrastingly, uses connector A for data (it needs access to bus data for CPU access to the UNIBUS mapping registers). The reason for the difference are not known - perhaps board layout issues?

With no KT24, a standard EUB memory can go in slot 2. That slot is special, though (i.e. wired differently from slots 3-6); the KT24 needs not just the UNIBUS lines and EUB address lines (to map from one to the other); it also has some special interconnects with the CPU, e.g. the 'UNIBUS adapter present' line. (Bus grant lines also bypass slot 2; hence the limitation to the KY24 or memory.)

Packaging

The -11/24 came in two different cabinets, the 5-1/4 inch high BA11-L and the 10-1/2 inch BA11-A (the same box as used in the -11/44).