Difference between revisions of "KT11-B Paging Option"
(A good start - describe basic architecture) |
m (→Construction: typo) |
||
Line 19: | Line 19: | ||
==Construction== | ==Construction== | ||
− | The KT11-B is composed of a large number of [[DEC card form factor|single width]] [[FLIP CHIP]]s, most of them simple, generic ones; they are plugged into a custom [[wire-wrap]] | + | The KT11-B is composed of a large number of [[DEC card form factor|single width]] [[FLIP CHIP]]s, most of them simple, generic ones; they are plugged into a custom [[wire-wrap]]ped [[backplane]]. |
{{PDP-11}} | {{PDP-11}} |
Revision as of 01:52, 10 August 2016
The KT11-B Paging Option is an option for the PDP-11/20, produced by DEC's Computer Special Systems group.
It allows the -11/20 to run time-sharing at the basic machine level; hardware features in the CPU prevent any user from interfering with the overall operation of the system. It does this by providing two modes for the CPU, 'User' and 'Exec', with certain operations (e.g. halting the machine) being dis-allowed in User mode.
It also allows the system to use up to 248 Kbytes of memory (the maximum allowed by the UNIBUS), although only a maximum of 64 KBytes is accessable (i.e. in the CPU's address space) at any one time. By proper programming, the mapping may be set so that user processes cannot interfere with each other's memory.
Architecture
In both Exec and User mode, when the KT11-B is enabled, the address space is divided up into 128 pages of 512 bytes each. Page maps, stored in main memory, map from virtual pages to physical pages (which always start on 512 byte boundaries).
Implementation
The KT11-B is interposed between the KA11 CPU, and the rest of the system (memory and devices); the UNIBUS from the CPU runs into the KT11-B, which processes UNIBUS cycles before passing them through to another UNIBUS, which holds all the memory, devices, etc.
The KA11 is also slightly modified, and a cable carries signals between the KA11 and KT11-B.
An associative memory in the KT11-B caches the 8 most-recently-used page table entries.
Construction
The KT11-B is composed of a large number of single width FLIP CHIPs, most of them simple, generic ones; they are plugged into a custom wire-wrapped backplane.
v • d • e PDP-11 Computers and Peripherals |
---|
UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11 Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11 CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150 CTI PDP-11s - PRO-325 • PRO-350 • PRO-380 Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences |