Difference between revisions of "KDJ11 CPUs"

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(A start - contains info common to all three KDJ11 boards)
 
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==Floating point==
 
==Floating point==
  
All the KDJ11 CPUs have two choices for floating point support (full PDP-11 floating point, as in the [[FP11-B Floating-Point Processor|FP11-B]] and [[FP11-C Floating-Point Processor|FP11-C]]): the base chip implements floating point using microcode; and a higher-performance separate chip, the [[FPJ11]].
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All the KDJ11 CPUs have two choices for floating point support (full [[FP11 floating point]]): the base DCJ11 chip, which implements floating point using [[microcode]]; and an optional  higher-performance separate dedicated chip, the [[FPJ11]].
  
 
==ODT==
 
==ODT==

Revision as of 16:05, 8 August 2017

There are several single-board CPUs which all use the 'Jaws' J-11 chipset:

Floating point

All the KDJ11 CPUs have two choices for floating point support (full FP11 floating point): the base DCJ11 chip, which implements floating point using microcode; and an optional higher-performance separate dedicated chip, the FPJ11.

ODT

The J-11 chip set includes microcode which provides 'front panel' functionality named 'ODT'; the ability to read and write to memory, start the process, etc. Unlike the ODT in the KDF11 CPUs, which only supported 18-bit addressing, the KDJ11's do not have this limitation.

Note, however, that the KDJ11-A and KDJ11-B power up with the cache enabled, even for ODT, so if the user writes some data into a given location using ODT, and then reads it back, they will get the correct data even if that memory location is faulty - the CPU is getting the (correct) data from the cache.

To have 'memory' reads and writes actually go to the memory, the cache has to be turned off:

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Note that starting the machine does an INIT, which will again enable the cache.