Difference between revisions of "KDF11 CPUs"

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*[[KDF11-U CPU]] - M7133 - [[UNIBUS]] hex-width CPU used in the [[PDP-11/24]]
 
*[[KDF11-U CPU]] - M7133 - [[UNIBUS]] hex-width CPU used in the [[PDP-11/24]]
  
Like the [[LSI-11]] models, as a cost-reduction measure they do not have a [[front panel]] to control them; instead, when the CPU is halted, specialized [[microcode]] used the main [[asynchronous serial line]] as a operating console. The command set is named Octal Debugging Technique (ODT); there are commands to read and write [[main memory]], start the CPU, etc.
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Like the [[LSI-11]] models, as a cost-reduction measure they do not have a [[front panel]] to control them; instead, when the CPU is halted, specialized [[microcode]] used the main [[asynchronous serial line]] as a operating console. The command set is named Octal Debugging Technique ([[QBUS CPU ODT|ODT]]); there are commands to read and write [[main memory]], start the CPU, etc.
  
The main [[asynchronous serial line|serial]] [[device controller|interface]] is normally configured so that when the CPU is running, sending a [[asynchronous serial line|break]] on the console serial line [[halt]]s the CPU.
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The main asynchronous serial [[device controller|interface]] is normally configured so that when the CPU is running, sending a [[asynchronous serial line|break]] on the console serial line [[halt]]s the CPU.
  
 
==Floating point==
 
==Floating point==

Revision as of 14:36, 23 May 2020

There are several single-board PDP-11 CPUs which all use the 'Fonz' F-11 chip set:

Like the LSI-11 models, as a cost-reduction measure they do not have a front panel to control them; instead, when the CPU is halted, specialized microcode used the main asynchronous serial line as a operating console. The command set is named Octal Debugging Technique (ODT); there are commands to read and write main memory, start the CPU, etc.

The main asynchronous serial interface is normally configured so that when the CPU is running, sending a break on the console serial line halts the CPU.

Floating point

All the KDF11 CPUs have two choices for floating point support (full PDP-11 FP11 floating point): a on-board single chip, the KEF11-A floating point chip, which implements floating point using microcode; and a higher-performance co-processor on a separate quad board, the FPF11 (M8188).

The FPF11 communicates with the KDF11 via a flat cable that plugs into the chip socket on the KDF11 where the KEF11-A is installed; is unusual that it can plug into either a QBUS or UNIBUS backplane, since it draws only power from the backplane - all signals come over the cable to the KDF11.