Difference between revisions of "KY11-A Programmer's Console"
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The 'Fetch', 'Exec' (Execute), 'Source', and 'Destination' indicators on the right hand side indicate that the CPU's [[state machine]] is in that [[KA11 CPU#State machine|major state]]. In the Source and Destination major states, the two 'Address' lights will count up, depending on the [[PDP-11 architecture#Addressing modes|addressing mode]] of that operand. The 'Run' light indicates that the CPU is [[execute|executing]] [[instruction]]s; the 'Bus' light indicates that a [[peripheral]] is in control of the [[UNIBUS]], either for an [[interrupt]], or performing [[Direct Memory Access|DMA]]. | The 'Fetch', 'Exec' (Execute), 'Source', and 'Destination' indicators on the right hand side indicate that the CPU's [[state machine]] is in that [[KA11 CPU#State machine|major state]]. In the Source and Destination major states, the two 'Address' lights will count up, depending on the [[PDP-11 architecture#Addressing modes|addressing mode]] of that operand. The 'Run' light indicates that the CPU is [[execute|executing]] [[instruction]]s; the 'Bus' light indicates that a [[peripheral]] is in control of the [[UNIBUS]], either for an [[interrupt]], or performing [[Direct Memory Access|DMA]]. | ||
| − | The 'Switch Register' is used to enter both addresses and data. | + | The '[[Switch Register]]' is used to enter both addresses and data. |
The 'Load Addr' (Address), 'Exam' (Examine), 'Start', and 'Dep' (Deposit) switches perform the named function. If the CPU is halted, toggling the 'Continue' switch does a variety of things, depending on the position the 'Enable/Halt' switch is in. In the Enable position, the CPU continues operating; in the Halt position, it performs either a single instruction, or single bus cycle, depending on the position of the 'S-Inst/S-Cycle' switch. | The 'Load Addr' (Address), 'Exam' (Examine), 'Start', and 'Dep' (Deposit) switches perform the named function. If the CPU is halted, toggling the 'Continue' switch does a variety of things, depending on the position the 'Enable/Halt' switch is in. In the Enable position, the CPU continues operating; in the Halt position, it performs either a single instruction, or single bus cycle, depending on the position of the 'S-Inst/S-Cycle' switch. | ||
Revision as of 21:26, 3 December 2018
The KY11-A Programmer's Console is the front panel for the KA11 CPU used in the PDP-11/20 and PDP-11/15.
It allows a programmer to display and deposit data in main memory, and start, halt and single-step the CPU; it also displays substantial amount of information as the machine operates.
It consists of a hex-wide board containing lights and switches, to which is attached a light shield (a flat plate with holes drilled through it, which prevents light from one light from straying into neighbouring light positions); the whole plugs into the CPU's backplane. There is also a printed plastic inlay, and a metal bezel which holds the inlay in position, and bolts to the BA11-C Mounting Box which holds the CPU.
Displays and controls
The 'Address' and 'Data' indicator arrays display memory addresses and data.
The 'Fetch', 'Exec' (Execute), 'Source', and 'Destination' indicators on the right hand side indicate that the CPU's state machine is in that major state. In the Source and Destination major states, the two 'Address' lights will count up, depending on the addressing mode of that operand. The 'Run' light indicates that the CPU is executing instructions; the 'Bus' light indicates that a peripheral is in control of the UNIBUS, either for an interrupt, or performing DMA.
The 'Switch Register' is used to enter both addresses and data.
The 'Load Addr' (Address), 'Exam' (Examine), 'Start', and 'Dep' (Deposit) switches perform the named function. If the CPU is halted, toggling the 'Continue' switch does a variety of things, depending on the position the 'Enable/Halt' switch is in. In the Enable position, the CPU continues operating; in the Halt position, it performs either a single instruction, or single bus cycle, depending on the position of the 'S-Inst/S-Cycle' switch.
| v • d • e PDP-11 Computers and Peripherals |
|---|
| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
| UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11 Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11 CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150 CTI PDP-11s - PRO-325 • PRO-350 • PRO-380 Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences |
