Difference between revisions of "FP11-E Floating Point Processor"

From Computer History Wiki
Jump to: navigation, search
(An OK start)
 
(Formal board names)
Line 3: Line 3:
 
It was a 4 [[DEC card form factor|hex]] board [[co-processor]]:
 
It was a 4 [[DEC card form factor|hex]] board [[co-processor]]:
  
* Next Micro-Address (M7878)
+
* Floating Point Next Micro-Address (FNUA - M7878)
* Exponent (M7879)
+
* Floating Point Exponent (FLTEXP - M7879)
* Multiplier Network (M7880)
+
* Multiplying Network (MULNET - M7880)
* Floating ALU (M7881)
+
* Floating Point ALU (FALU - M7881)
  
 
which mounted in slots 8-11 of the CPU [[backplane]]. The main CPU can detect the presence of the FP11-E, and, if present, uses it to perform any floating point [[instruction]]s found in the [[program]].
 
which mounted in slots 8-11 of the CPU [[backplane]]. The main CPU can detect the presence of the FP11-E, and, if present, uses it to perform any floating point [[instruction]]s found in the [[program]].

Revision as of 02:50, 12 March 2019

The FP11-E Floating Point Processor is the optional hardware floating point unit for the KD11-K CPU of the PDP-11/60. The KD11-K provided the full FP11 floating point using microcode; the FP11-E was an option which provided considerably improved floating point performance.

It was a 4 hex board co-processor:

  • Floating Point Next Micro-Address (FNUA - M7878)
  • Floating Point Exponent (FLTEXP - M7879)
  • Multiplying Network (MULNET - M7880)
  • Floating Point ALU (FALU - M7881)

which mounted in slots 8-11 of the CPU backplane. The main CPU can detect the presence of the FP11-E, and, if present, uses it to perform any floating point instructions found in the program.

Electrically, it connected directly to the CPU and is controlled bu it; unidirectional data buses are provided to move information (including instructions) from the CPU to the FPP, and vice versa.

The FP11-E has its own microcode, 88 bits wide, to control its operation, and interaction with the main CPU.