FP11-E Floating Point Processor: Difference between revisions
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* Floating Point ALU (FALU - M7881) | * Floating Point ALU (FALU - M7881) | ||
which mounted in slots 8-11 of the CPU [[backplane]]. The main CPU can detect the presence of the FP11-E, and, if present, uses it to perform any floating point [[instruction]]s found in the [[program]]. | which mounted in slots 8-11 of the [[Central Processing Unit|CPU]]'s [[backplane]]. The main CPU can detect the presence of the FP11-E, and, if present, uses it to perform any floating point [[instruction]]s found in the [[program]]. | ||
Electrically, it connected directly to the CPU and is controlled | Electrically, it connected directly to the CPU and is controlled by it; unidirectional data buses are provided to move information (including instructions) from the CPU to the FPP, and vice versa. | ||
The FP11-E has its own microcode, 88 bits wide, to control its operation, and interaction with the main CPU. | The FP11-E has its own microcode, 88 bits wide, to control its operation, and interaction with the main CPU. | ||
Revision as of 01:41, 18 June 2020
The FP11-E Floating Point Processor is the optional hardware floating point unit for the KD11-K CPU of the PDP-11/60. The KD11-K provided the full FP11 floating point using microcode; the FP11-E was an option which provided considerably improved floating point performance.
It was a 4 hex board co-processor:
- Floating Point Next Micro-Address (FNUA - M7878)
- Floating Point Exponent (FLTEXP - M7879)
- Multiplying Network (MULNET - M7880)
- Floating Point ALU (FALU - M7881)
which mounted in slots 8-11 of the CPU's backplane. The main CPU can detect the presence of the FP11-E, and, if present, uses it to perform any floating point instructions found in the program.
Electrically, it connected directly to the CPU and is controlled by it; unidirectional data buses are provided to move information (including instructions) from the CPU to the FPP, and vice versa.
The FP11-E has its own microcode, 88 bits wide, to control its operation, and interaction with the main CPU.
| v • d • e PDP-11 Computers and Peripherals |
|---|
| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
| UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11 Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11 CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150 CTI PDP-11s - PRO-325 • PRO-350 • PRO-380 Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences |
