Difference between revisions of "KDF11-U CPU"

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* [http://ana-3.lcs.mit.edu/~jnc/tech/pdp11/dload/EK-11024-TM-003.pdf PDP-11/24 System Technical Manual] (EK-11024-TM-003) - the KDF11-U is covered in Chapters -5; the M7133-YA is documented in Appendix D
 
* [http://ana-3.lcs.mit.edu/~jnc/tech/pdp11/dload/EK-11024-TM-003.pdf PDP-11/24 System Technical Manual] (EK-11024-TM-003) - the KDF11-U is covered in Chapters -5; the M7133-YA is documented in Appendix D
* [http://www.bitsavers.org/pdf/dec/pdp11/1124/MP01018_1124schem_Aug80.pdf xx Field Maintenance Print Set ] - - KDF11-UA Field Maintenance Print Set (MP01028) is on pp. 145-167  
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* [http://www.bitsavers.org/pdf/dec/pdp11/1124/MP01018_1124schem_Aug80.pdf 11/24 Field Maintenance Print Set] - - KDF11-UA Field Maintenance Print Set (MP01028) is on pp. 145-167  
  
 
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Revision as of 12:10, 15 January 2022

KDF11-U card with KTF11-A and KEF11-A

The KDF11-U is the PDP-11 CPU for the PDP-11/24; it used the UNIBUS, unlike the QBUS of the other KDF11 CPUs. It was implemented as a single hex board, the KDF11-UA M7133, using the same 'Fonz' F-11 chip set as the other KDF11 CPUs.

The board has seven 40-pin chip sockets for the chipset (including the KTF11-A memory mapping and KEF11-A floating point chips); it can also hold the double-width KEF11-B CIS chip 6-chip carrier implementing the PDP-11 Commercial Instruction Set (CIS) (not all KDF11 CPUs can hold this). In addition to the basic CPU functionality, the board also included two asynchronous serial lines (led out through the backplane).

There are two different versions of the KDF11-U; in the later M7133-YA, in order to reduce the cost, a number of individual DIP chips were replaced with a pair of custom gate array chips, and the board was re-laid-out.

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