KDJ11-A CPU: Difference between revisions

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[[Image:KDJ11-A.jpg|150px|thumb|right|KDJ11-A CPU]]
[[Image:KDJ11-A.jpg|150px|thumb|right|KDJ11-A CPU]]


The '''KDJ11-A''' CPU board (M8192) is the first [[QBUS]] [[CPU]] card using the [[J-11]] chip of the [[PDP-11]]. It is a [[DEC card form factor|dual-height]] board, and was used to upgrade [[PDP-11/23]] systems. (Confusingly, no DEC 'PDP-11/xx'' system is specified as using the KDJ11-A.)
The '''KDJ11-A''' CPU board (M8192) is the first [[QBUS]] [[CPU]] card using the [[J-11]] chip of the [[PDP-11]]. It is a [[DEC card form factor|dual-height]] board, and was used to upgrade [[PDP-11/23]] systems. (Confusingly, no DEC 'PDP-11/xx' system is specified as using the KDJ11-A.)


It contains an 8K-byte write-through cache (set size 1, block size 1 16-bit word), protected by parity; cache control logic inspects [[DMA]] transfers and invalidates cache entries for memory which is written to by a device.
It contains an 8K-byte write-through cache (set size 1, block size 1 16-bit word), protected by parity; cache control logic inspects [[DMA]] transfers and invalidates cache entries for memory which is written to by a device.

Revision as of 11:24, 7 September 2016

KDJ11-A CPU

The KDJ11-A CPU board (M8192) is the first QBUS CPU card using the J-11 chip of the PDP-11. It is a dual-height board, and was used to upgrade PDP-11/23 systems. (Confusingly, no DEC 'PDP-11/xx' system is specified as using the KDJ11-A.)

It contains an 8K-byte write-through cache (set size 1, block size 1 16-bit word), protected by parity; cache control logic inspects DMA transfers and invalidates cache entries for memory which is written to by a device.

It also provides a set of diagnostic LEDs, and a Line Time Clock; but no other devices (boot PROM, serial line, etc).

Although the J-11 does implement FP11 floating-point, the board can use the FPJ11 Floating Point Accelerator (note that only the -YB version of the board operates correctly with the FPJ11).