Difference between revisions of "KDF11-U CPU"
m (Add links) |
m (bah, typo) |
||
Line 1: | Line 1: | ||
The '''KDF11-U''' [[PDP-11 architecture|PDP-11]] [[Central Processing Unit|CPU]] for the [[PDP-11/24]] was implemented as a single [[DEC card form factor|hex]] card, the KDF11-UA M7133, using the same 'Fonz' [[F-11 chip set]] as the other [[KDF11 CPUs]]. | The '''KDF11-U''' [[PDP-11 architecture|PDP-11]] [[Central Processing Unit|CPU]] for the [[PDP-11/24]] was implemented as a single [[DEC card form factor|hex]] card, the KDF11-UA M7133, using the same 'Fonz' [[F-11 chip set]] as the other [[KDF11 CPUs]]. | ||
− | In addition to the basic CPU functionality (including [[PDP-11 Memory Management|memory mapping]] and [[floating point]]), it also included sockets to hold a 6-chip carrier implementing the [[PDP-11 Commercial Instruction Set]] (CIS), and two [[asynchronous serial | + | In addition to the basic CPU functionality (including [[PDP-11 Memory Management|memory mapping]] and [[floating point]]), it also included sockets to hold a 6-chip carrier implementing the [[PDP-11 Commercial Instruction Set]] (CIS), and two [[asynchronous serial line]]s (led out through the [[backplane]]). |
There are two different versions of the KDF11-U; in the later M7133-YA (documented in the manual EK-11024-TM-003, Appendix D), in order to reduce the cost, a number of individual [[Dual Inline Package|DIPs]] were replaced with a pair of custom [[gate array]] chips, and the board was re-laid-out. | There are two different versions of the KDF11-U; in the later M7133-YA (documented in the manual EK-11024-TM-003, Appendix D), in order to reduce the cost, a number of individual [[Dual Inline Package|DIPs]] were replaced with a pair of custom [[gate array]] chips, and the board was re-laid-out. |
Revision as of 11:22, 17 December 2017
The KDF11-U PDP-11 CPU for the PDP-11/24 was implemented as a single hex card, the KDF11-UA M7133, using the same 'Fonz' F-11 chip set as the other KDF11 CPUs.
In addition to the basic CPU functionality (including memory mapping and floating point), it also included sockets to hold a 6-chip carrier implementing the PDP-11 Commercial Instruction Set (CIS), and two asynchronous serial lines (led out through the backplane).
There are two different versions of the KDF11-U; in the later M7133-YA (documented in the manual EK-11024-TM-003, Appendix D), in order to reduce the cost, a number of individual DIPs were replaced with a pair of custom gate array chips, and the board was re-laid-out.
v • d • e PDP-11 Computers and Peripherals |
---|
UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
[Expand] |
---|