KDJ11-A CPU: Difference between revisions

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It also provides a set of diagnostic [[LED]]s, and a Line Time Clock; but no other devices (boot PROM, serial line, etc).
It also provides a set of diagnostic [[LED]]s, and a Line Time Clock; but no other devices (boot PROM, serial line, etc).


Although the J-11 does implement FP11 floating-point, the board can use the FPJ11 Floating Point Accelerator (note that only the -YB version of the board operates correctly with the FPJ11).
Although the J-11 does implement [[FP11 floating point|FP11]] floating-point, the board can also use the optional [[FPJ11 floating point accelerator]] [[integrated circuit|chip]]; note that only the -YB version of the board operates correctly with the FPJ11.


{{PDP-11}}
{{PDP-11}}

Revision as of 20:27, 5 January 2020

KDJ11-A CPU

The KDJ11-A CPU board (M8192) is the first QBUS CPU card using the J-11 chip set of the PDP-11. It is a dual-height board, and was used to upgrade PDP-11/23 systems. (Confusingly, no DEC 'PDP-11/xx' system is specified as using the KDJ11-A.)

It contains an 8K-byte write-through cache (set size 1, block size 1 16-bit word), protected by parity; cache control logic inspects DMA transfers and invalidates cache entries for memory which is written to by a device.

It also provides a set of diagnostic LEDs, and a Line Time Clock; but no other devices (boot PROM, serial line, etc).

Although the J-11 does implement FP11 floating-point, the board can also use the optional FPJ11 floating point accelerator chip; note that only the -YB version of the board operates correctly with the FPJ11.