KD11-Z CPU

The KD11-Z CPU was the CPU of the PDP-11/44; the letter code 'Z' was a tip to the fact that it was the last native UNIBUS PDP-11 CPU, and the last to be made out of discrete chips, and not a microprocessor.

The KD11-Z used the Extended UNIBUS for its bus to main memory, allowing it to have up to 4 mega-bytes of main memory. All devices were attached to a semi-separate UNIBUS (it and the EUB shared data lines, but not address lines); DMA devices could gain access to the memory via a UNIBUS map which connected the two, and mapped UNIBUS addresses to main memory addresses.

Full PDP-11 Memory Management and a cache (the KK11-B) were standard on all KD11-Z's. It also supported the optional FP11-F floating point (full FP11 floating point) and/or the KE44-A Commercial Instruction Set Processor; these plugged into dedicated slots in the CPU backplane (it could work with either, or both).

Hardware Details

The basic KD11-Z CPU consisted of five hex boards:

• M7094 Data Path module
• M7095 Control module
• M7096 Multifunction module
• M7097 KK11-B Cache module
• M7098 UNIBUS interface module

In addition, a single dual board, the M7090 Console Interface module, held a number of Berg connector headers used for various input/output functions.

These were placed in a 14-slot CPU-specific backplane, along with the optional FP11-F and KE44-A, and all the main memory cards (the EUB was only present on the main backplane), leaving two slots (one MUD/SPC slot, and one SPC slot, which also contained the 'UNIBUS out').

Board locations are:

	Connector
Slot	A	B	C	D	E	F
1	M7090 CIM		M7091 CIS
2	M7092 CIS
3	M7093 Floating point
4	M7094 Data paths
5	M7095 Control
6	M7096 MFM
7	M7097 Cache
8	M7098 UNIBUS interface
9	M8722 MS11-M
10	M8722 MS11-M (optional)
11	M8722 MS11-M (optional)
12	M8722 MS11-M (optional)
13	MUD/SPC
14	UNIBUS Out		SPC

The details of how the EUB and UNIBUS interoperated are not yet clear (it is not covered in DEC's documentation; it was almost certainly similar to that used in the -11/24.