Difference between revisions of "KDJ11-A CPU"
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− | [[Image:KDJ11-A.jpg| | + | [[Image:KDJ11-A.jpg|200px|thumb|right|KDJ11-A CPU]] |
− | The '''KDJ11-A''' | + | The '''KDJ11-A CPU''' board (M8192) is the first [[QBUS]] [[PDP-11]] [[Central Processing Unit|CPU]] card using the [[J-11 chip set]]. It is a [[DEC card form factor|dual-height]] board, and was used to upgrade [[PDP-11/23]] systems. (Confusingly, no DEC 'PDP-11/xx' system is specified as using the KDJ11-A.) |
− | It contains an 8K-byte write-through cache (set size 1, block size 1 16-bit word), protected by parity; cache control logic inspects [[DMA]] transfers and invalidates cache entries for memory which is written to by a device. | + | It contains an 8K-byte write-through [[cache]] (set size 1, block size 1 16-bit word), protected by [[parity]]; cache control logic inspects [[Direct Memory Access|DMA]] transfers on the QBUS and invalidates cache entries for [[main memory]] which is written to by a [[peripheral|device]]. |
− | It also provides a set of diagnostic [[LED]]s, and a | + | It also provides a set of diagnostic [[Light Emitting Diode|LED]]s, and a [[line time clock]]; but no other devices (boot [[PROM]], [[serial line]], etc). Both the LTC, and its control [[register]], are enabled by a single configuration [[jumper]] (below). |
Although the J-11 does implement [[FP11 floating point|FP11]] floating-point, the board can also use the optional [[FPJ11 floating point accelerator]] [[integrated circuit|chip]]; note that only the -YB version of the board operates correctly with the FPJ11. | Although the J-11 does implement [[FP11 floating point|FP11]] floating-point, the board can also use the optional [[FPJ11 floating point accelerator]] [[integrated circuit|chip]]; note that only the -YB version of the board operates correctly with the FPJ11. | ||
+ | |||
+ | ==Configuration== | ||
+ | |||
+ | A limited amount of configuration can be done with a set of nine jumpers (in the middle of the card).Their functions are: | ||
+ | |||
+ | {| border=1 | ||
+ | ! Jumper !! Function !! In || Out | ||
+ | |- | ||
+ | |W1 || [[Bootstrap]] [[address]] bit 15 || 1 || 0 | ||
+ | |- | ||
+ | |W2 || Bootstrap address bit 14 || 1 || 0 | ||
+ | |- | ||
+ | |W3 || Powerup option bit 2 | ||
+ | |- | ||
+ | |W4 || Bootstrap address bit 13 || 1 || 0 | ||
+ | |- | ||
+ | |W5 || [[Halt]] enable || Halt || [[Trap]] to 4 | ||
+ | |- | ||
+ | |W6 || Bootstrap address bit 12 || 1 || 0 | ||
+ | |- | ||
+ | |W7 || Powerup option bit 1 | ||
+ | |- | ||
+ | |W8 || Wakeup circuit || Disabled || Enabled | ||
+ | |- | ||
+ | |W9 || BEVNT/LTC register || Disabled || Enabled | ||
+ | |} | ||
+ | |||
+ | Powerup options are: | ||
+ | |||
+ | {| border=1 | ||
+ | ! W3 !! W7 !! Action | ||
+ | |- | ||
+ | | In || In || [[Program Counter|PC]] from 024, [[Processor Status Word|PS]] from 026 | ||
+ | |- | ||
+ | | In || Out || [[QBUS CPU ODT|ODT]], PS=0 | ||
+ | |- | ||
+ | | Out || In || PC=0173000, PS=340 | ||
+ | |- | ||
+ | | Out || Out || PC=configuration jumpers, PS=340 | ||
+ | |} | ||
{{PDP-11}} | {{PDP-11}} |
Revision as of 00:03, 21 May 2020
The KDJ11-A CPU board (M8192) is the first QBUS PDP-11 CPU card using the J-11 chip set. It is a dual-height board, and was used to upgrade PDP-11/23 systems. (Confusingly, no DEC 'PDP-11/xx' system is specified as using the KDJ11-A.)
It contains an 8K-byte write-through cache (set size 1, block size 1 16-bit word), protected by parity; cache control logic inspects DMA transfers on the QBUS and invalidates cache entries for main memory which is written to by a device.
It also provides a set of diagnostic LEDs, and a line time clock; but no other devices (boot PROM, serial line, etc). Both the LTC, and its control register, are enabled by a single configuration jumper (below).
Although the J-11 does implement FP11 floating-point, the board can also use the optional FPJ11 floating point accelerator chip; note that only the -YB version of the board operates correctly with the FPJ11.
Configuration
A limited amount of configuration can be done with a set of nine jumpers (in the middle of the card).Their functions are:
Jumper | Function | In | Out |
---|---|---|---|
W1 | Bootstrap address bit 15 | 1 | 0 |
W2 | Bootstrap address bit 14 | 1 | 0 |
W3 | Powerup option bit 2 | ||
W4 | Bootstrap address bit 13 | 1 | 0 |
W5 | Halt enable | Halt | Trap to 4 |
W6 | Bootstrap address bit 12 | 1 | 0 |
W7 | Powerup option bit 1 | ||
W8 | Wakeup circuit | Disabled | Enabled |
W9 | BEVNT/LTC register | Disabled | Enabled |
Powerup options are:
W3 | W7 | Action |
---|---|---|
In | In | PC from 024, PS from 026 |
In | Out | ODT, PS=0 |
Out | In | PC=0173000, PS=340 |
Out | Out | PC=configuration jumpers, PS=340 |
v • d • e PDP-11 Computers and Peripherals |
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UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11 Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11 CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150 CTI PDP-11s - PRO-325 • PRO-350 • PRO-380 Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences |