LSI-11

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Revision as of 19:06, 19 August 2019 by Jnc (talk | contribs) (Mention same QBUS limits, ODT)
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The LSI-11 was DEC's first cost-reduced PDP-11 CPU, using the QBUS and the LSI-11 chip set. It was the first of the LSI-11 CPUs; it had the same QBUS limitations, and used of ODT for control.

The LSI-11 is a quad board (M7264) with additional functionality on-board. They were popular in OEM usage.

The usual CPU options were available for the LSI-11: the KEV11-A, for the EIS/FIS instructions; the KEV11-B provides EIS without FIS; the KEV11-C provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS).

The chip order (from the left, with the contact finger edge down, and the component side facing the viewer) is KEV11, uROM 1, uROM 0, Control, Data Path.

Variant models

Many different LSI-11 models exist, including the KD11-F and KD11-H base versions, and numerous other variants. The KD11-F version includes 4KW of MOS RAM on-board; the KD11-H version has the RAM deleted.

Others included various KEV11 chips pre-installed:

  • the KD11-L is a KD11-F with a KEV11-A
  • the KD11-N is a KD11-H with a KEV11-A
  • the KD11-P is a KD11-F with a KEV11-C
  • the KD11-Q is a KD11-H with a KEV11-C

Some models include additional cards:

Links