DL11 asynchronous serial line interface
The DL11 asynchronous serial line interface card (M7800) was a UNIBUS card for the PDP-11 series of computers; it was a quad format card, and used an SPC slot. It was a functionally identical single-board replacment for the KL11 asynchronous serial line, which consisted of a dual card, and two single cards.
It provided both 20mA and (in some versions) EIA connectivity at speeds of 110 to 9600 baud; the DL11-E version also provided full modem control.
Programing interface
The DL11 has 2 registers for the receive side (one Control and Status Register - CSR - and one data buffer register), and similarly, two for the transmit side. Each DL11 has two interrupt vector - again, one receive, and one transmit.
Configuration
The bus address, interrupt vector, and line parameters (parity, stop bits, and data bits) were selected by soldered jumpers; the baud rate was set by a combination of a replaceable crystals (several different ones were standard), and a pair of 8-position dial selectors (one for transmit, one for receive) which selected a rate:
Crystal Speed | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
---|---|---|---|---|---|---|---|---|
884.8 KHz | 35.7 | 55 | 110 | 220 | 440 | 880 | 1320 | 1760 |
1.033 MHz | 44.8 | 67.3 | 134.5 | 269 | 538 | 1076 | 1614 | 2152 |
1.152 MHz | 50 | 75 | 150 | 300 | 600 | 1200 | 1800 | 2400 |
4.608 MHz | 200 | 300 | 600 | 1200 | 2400 | 4800 | 7200 | 9600 |
The address and vector jumpers specify the base of the bus address and vector, in binary. On the DL11, it is only possible to set the base of the entire group of 4 registers, the transmit and receive register groups cannot be moved around independently. Similarly for the vector, only the base of the pair of vectors can be configured; the receive (at B) and transmit (at B+4) are paired in the hardware.
The simple rule on the DL11 is that vector jumpers are the inverse of address jumpers: for the vector, jumpers are 'in' for '1', and for the address, they are 'in' for '0'. (This inversion can be a memory jogger - 'Oh, the DL11, that blasted interface where the jumper sense is inverted between address and vector!' Then one only has to look up one of the two.)
So, A3 is the 3rd bit of the address, i.e. the 010 bit, the lowest one that is configurable (the device is a block of 8 bytes, from xxxxx0 to xxxxx7, so it is not possible to set any of qthe low 3 bits in the base address, they must be 0), and A10 is the highest bit which can be changed. V3 through V8 perform a similar function for the vector.
The following table shows the bits which are affected when the jumper is in.
Address Jumper | Address Bit | Vector Jumper | Vector bit |
---|---|---|---|
A3 | -010 | V3 | +010 |
A4 | -020 | V4 | +020 |
A5 | -040 | V5 | +040 |
A6 | -0100 | V6 | +0100 |
A7 | -0200 | V7 | +0200 |
A8 | -0400 | V8 | +0400 |
A9 | -01000 | ||
A10 | -02000 |
Sample configurations
For the PDP-11 standard console (which is always KL11/DL11 compatible device), the 'zeroth' DL11, 777560 is the base address (so the receiver registers are 777560-2, and the transmitter are 777564-6), and 060 is the base vector. The first DL11 after the console is always assigned the address 776500, and vector 300.
The following table gives the jumper configuration for these two:
Jumper | Bit | Console | First DL11 |
---|---|---|---|
A3 | 010 | In | In |
A4 | 020 | Out | In |
A5 | 040 | Out | In |
A6 | 0100 | Out | Out |
A7 | 0200 | In | In |
A8 | 0400 | Out | Out |
A9 | 01000 | Out | In |
A10 | 02000 | Out | Out |
V3 | 010 | Out | Out |
V4 | 020 | In | Out |
V5 | 040 | In | Out |
V6 | 0100 | Out | In |
V7 | 0200 | Out | In |
V8 | 0400 | Out | Out |
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