PDP-11/70

PDP-11/70
Manufacturer:	Digital Equipment Corporation
Year Introduced:	March 1975
Word Size:	16 bit
Physical Address Size:	22 bit
Virtual Address Size:	16 bit
Bus Architecture:	UNIBUS

First design using cache memory

hampage.hu

Quote: Introduced in March 1975, the PDP-11/70 is the bigest of the PDP-11s. The KB11B is a re-enginered version of the PDP-11/45's CPU, with some new features. Two of the most important changes was the addition of cache (2 KByte of bipolar memory) and the 22-bit memory management. The latter enables the usage of memory up to 2 Mwords, using the UNIBUS map, which translates 18-bit UNIBUS addresses to 22-bit physical addresses. The kernel/supervisor/user operating modes and the MMU was standard. Important options: FPP, MASSBUS adapters (RH70's, up to four) with direct memory access.

The original processor had the floating point unit of the PDP-11/45, which turned out to be ineffective, so it was resdesigned (KB11C). Overall performance is 0.6th of the VAX-11/780.

A normal system occupied at least two H960 cabinets (memory and CPU), the UNIBUS expansion needed another. There were also later revisions sold in another cabinet, without the front panel (Datasystem 570?).

Trivia: The original business plan called for 1000 PDP-11/70's to be built, it was supposed to be a "stopgap" until the "wide word machine" came out. This "word wide machine" was originally a small PDP-10 (36-bit machine), but it was then cancelled in favor of the 32-bit VAX. Anyhow, more than 10,000 PDP-11/70's were built.

Gallery