Difference between revisions of "LSI-11/2"
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'''''Note:''''' The image in the "Microcomputer Products Handbook" (pg. C-18) is erroneous; the order of the chips (from the handle end) is, in fact, [[KEV11]], Control, uROM 1, uROM 0, Data Path (per the KD11-HA print set); the order given in the Handbook is that for the LSI-11 (no doubt an image was re-used without checking). | '''''Note:''''' The image in the "Microcomputer Products Handbook" (pg. C-18) is erroneous; the order of the chips (from the handle end) is, in fact, [[KEV11]], Control, uROM 1, uROM 0, Data Path (per the KD11-HA print set); the order given in the Handbook is that for the LSI-11 (no doubt an image was re-used without checking). | ||
| − | == | + | ==See also== |
| + | |||
| + | * [[:File:M7270.jpg|Another LSI-11/2]] - Also without FIS chip | ||
| + | |||
| + | ==External links== | ||
* [http://web.frainresearch.org:8080/projects/pdp-11/lsi-11.php LSI-11 Processors] | * [http://web.frainresearch.org:8080/projects/pdp-11/lsi-11.php LSI-11 Processors] | ||
Revision as of 08:23, 11 April 2022
The LSI-11/2 (also known as the KD11-HA) is the later type of the LSI-11 CPUs, using the same LSI-11 chip set. It contains only the CPU, and nothing else; it is otherwise identical in functionality to the LSI-11, including the use of ODT, and it has the same QBUS limitations as the LSI-11.
It is a dual board (M7270); it supports all the same options as the LSI-11.
These include the KEV11-A, for the EIS/FIS instructions; the KEV11-B, which provides EIS without FIS; and the KEV11-C, which provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS).
The KD11-NA is an LSI-11/2 with the KEV11-A pre-installed.
The LSI-11/2 likely also supported the optional KUV11 Writeable Control Store.
Note: The image in the "Microcomputer Products Handbook" (pg. C-18) is erroneous; the order of the chips (from the handle end) is, in fact, KEV11, Control, uROM 1, uROM 0, Data Path (per the KD11-HA print set); the order given in the Handbook is that for the LSI-11 (no doubt an image was re-used without checking).
See also
- Another LSI-11/2 - Also without FIS chip
External links
| v • d • e PDP-11 Computers and Peripherals |
|---|
| UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70 PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94 QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93 QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management |
| UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U
Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11 Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11 CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150 CTI PDP-11s - PRO-325 • PRO-350 • PRO-380 Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences |
