PDP-11/05

A PDP-11/05 from a sales brochure.

PDP-11/05
Manufacturer:	Digital Equipment Corporation
Architecture:	PDP-11
Year Introduced:	June 1972
Word Size:	16 bit
Physical Address Size:	18 bits (only 16 bits usable)
Bus Architecture:	UNIBUS

The PDP-11/05 was the fourth model in the PDP-11 series, following the PDP-11/20, the PDP-11/45 and the PDP-11/40; it used the KD11-B CPU. It was intended as a cost-reduced low-end machine to replace the PDP-11/20. Like all the other early PDP-11's, it was a UNIBUS machine.

The PDP-11/05 was absolutely identical to the PDP-11/10; the only difference between the /05 and the /10 was the number on the front panel. The /05 was aimed toward the OEM market, while the /10 was intended for end-users. General usage (following DEC's lead) is to refer to all these machines as '11/05's.

The earliest units came in a 5-1/4" box, which had room for only a double system unit backplane. A later version, the /05N and /10N, came in a 10-1/2" BA11-D Mounting Box; the final /05S and /10S versions came in the 10-1/2" BA11-K Mounting Box.

Backplane versions

The PDP-11/05 and /10 came in three versions, with four different versions of the main backplane (the 9-slot system unit holding the two CPU cards).

Original version

The original /05 and /10 came with backplanes wired to hold MM11-L 16 Kbyte core memory units. There were two different backplanes: one (called "Configuration 1" in DEC documentation) held two memory units, with one slot left for quad-height SPC devices; the other ("Configuration 2") held one memory unit, and provided four SPC slots.

Here are the slot assignments in the backplanes (as seen from the board insertion side of the backplane, not the wire-wrap pin side, as is common in DEC documentation) :

Configuration 1:

	Connector
Slot	A	B	C	D	E	F
1	M7260 CPU board #0
2	M7261 CPU board #1
3	G110 Memory Control
4	G231 Memory Driver
5	UNIBUS Terminator		H213/H214 Core stack
6	G110 Memory Control
7	G231 Memory Driver
8	UNIBUS Out		H213/H214 Core stack
9	KM11-1	KM11-2	SPC

Configuration 2:

	Connector
Slot	A	B	C	D	E	F
1	M7260 CPU board #0
2	M7261 CPU board #1
3	G110 Memory Control
4	G231 Memory Driver
5	UNIBUS Terminator		H213/H214 Core stack
6	Unused		SPC
7	UNIBUS Out		SPC
8	KM11-1	KM11-2	SPC
9	DF11 Communications Line Adapter		SPC

Note that the slots are numbered from 1 at the start; this is the inverse of the numbering for these backplanes in some DEC documentation.

-N type

The /05N and /10N had a slightly different backplane, which had space for two MM11-L memory units, but deleted the SPC slot of the previous double MM11-L backplane, and replaced it with a slot to hold the dual-height M9970 console terminal cable board, and also a dual-height DF11.

Board locations (again, as seen from the board insertion side of the backplane) are:

	Connector
Slot	A	B	C	D	E	F
1	DF11		M9970		KM11-A	KM11-B
2	M7260
3	M7261
4	UNIBUS Terminator		H213/H214 Core stack
5	G110 Memory Control
6	G231 Memory Driver
7	G110 Memory Control
8	G231 Memory Driver
9	UNIBUS Out		H213/H214 Core stack

Note that the two KM11 slots are at the other side of the backplane from the slots used for them in the 'Configuration 1' and 'Configuration 2' backplanes.

-S type

The /05S and /10S came with a backplane wired to hold an MM11-U 32 Kbyte core memory, and which provided three SPC slots. The layout (from the board insertion side) is:

	Connector
Slot	A	B	C	D	E	F
1	M7260 CPU board #0
2	M7261 CPU board #1
3	UNIBUS Terminator		SPC
4	DF11 or M9970		SPC
5	KM11-1	KM11-2	SPC
6	G235 X-Y Drive
7	H217-D Core Stack
8	G114 Sense/Inhibit
9	UNIBUS Out		M8293 Memory Control

Keys

Unlike all the other keyed PDP-11s, which use a circular Ace key, the /05's (and /10s) use a normal flat Yale-type key. The original key is a Chicago Lock Company key, code "GRB 2"; this is cut 215, on a Chicago K5K or Ilco S1041T blank. If simply duplicating an existing key, Hillman Y11 and FR4 blanks may be used (both work, but one has to be trimmed a bit, length-wise).

Gallery