Difference between revisions of "LSI-11/2"

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(Keep the lsi-11 and lsi-11/2 together, for now)
 
(Make separate page for this board)
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#Redirect [[LSI-11]]
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The '''LSI-11/2''' (also known as the '''KD11-HA''') is the later version of the [[LSI-11]]. It contains only the [[Central Processing Unit|CPU]], and nothing else; it is otherwise identical in functionality to the LSI-11, including the use of ODT, rather than the up-to-then conventional [[front panel]]
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It is a [[DEC card form factor|dual]] board (M7270), using the [[LSI-11 chip set‎]], and supports all the same options as the LSI-11.
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These include the [[KEV11-A floating point|KEV11-A]], for the [[PDP-11 Extended Instruction Set|EIS]]/[[FIS floating point|FIS]] instructions; the [[KEV11-B Extended Instruction Set|KEV11-B]], which provides EIS without FIS; and the [[KEV11-C Commercial Instruction Set‎|KEV11-C]] provides a subset of the PDP-11 [[PDP-11 Commercial Instruction Set|CIS]] (it also apparently includes the EIS, but not the FIS).
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It likely also supported the optional [[KUV11 Writeable Control Store]].
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'''''Note:''''' The image in the "Microcomputer Products Handbook" (pg. C-18) is erroneous; the order of the chips (from the handle end) is, in fact, [[KEV11]], Control, uROM 1, uROM 0, Data Path (per the KD11-HA print set); the order given in the Handbook is that for the LSI-11 (no doubt an image was re-used without checking).
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==Links==
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* [http://web.frainresearch.org:8080/projects/pdp-11/lsi-11.php LSI-11 Processors]
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{{PDP-11}}
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[[Category: PDP-11 Processors]]
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[[Category: QBUS Processors]]

Revision as of 17:52, 23 November 2018

The LSI-11/2 (also known as the KD11-HA) is the later version of the LSI-11. It contains only the CPU, and nothing else; it is otherwise identical in functionality to the LSI-11, including the use of ODT, rather than the up-to-then conventional front panel

It is a dual board (M7270), using the LSI-11 chip set‎, and supports all the same options as the LSI-11.

These include the KEV11-A, for the EIS/FIS instructions; the KEV11-B, which provides EIS without FIS; and the KEV11-C provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS).

It likely also supported the optional KUV11 Writeable Control Store.

Note: The image in the "Microcomputer Products Handbook" (pg. C-18) is erroneous; the order of the chips (from the handle end) is, in fact, KEV11, Control, uROM 1, uROM 0, Data Path (per the KD11-HA print set); the order given in the Handbook is that for the LSI-11 (no doubt an image was re-used without checking).

Links