The usual CPU options were available for the LSI-11: the KEV11-A, for the EIS/FIS instructions; the KEV11-B provides EIS without FIS; the KEV11-C provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS).
It also supported the optional KUV11 Writeable Control Store.
They were the first PDP-11 model to not have a front panel to control them; instead, as a cost-reduction measure, when the CPU is halted, specialized microcode used the main serial line as a operating console. The command set is named Octal Debugging Technique (ODT); there are commands to read and write main memory, start the CPU, etc.
The main serial interface is normally configured so that when the CPU is running, sending a break on the console serial line halts the CPU.
Many different LSI-11 models exist, including the KD11-F and KD11-H base versions, and numerous other variants. The KD11-F version includes 4KW of MOS RAM on-board; the KD11-H version has the RAM deleted.
Others included various KEV11 chips pre-installed:
- the KD11-L is a KD11-F with a KEV11-A
- the KD11-N is a KD11-H with a KEV11-A
- the KD11-P is a KD11-F with a KEV11-C
- the KD11-Q is a KD11-H with a KEV11-C
Some models include additional cards:
- the KD11-J is a KD11-H sold with an MMV11-A QBUS core memory card
- the KD11-R is a KD11-H sold with an MSV11-C QBUS MOS memory card
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Clones: CM 1420