Difference between revisions of "PDP-11/05"

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[[Image:pdp11-05.jpg|150px|right|thumb|A PDP-11/05 from a sales brochure.]]
 
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{{Infobox Machine
 
{{Infobox Machine
 
| name = PDP-11/05
 
| name = PDP-11/05
−
| manufacturer = [[Digital Equipment Corporation]]
+
| image = pdp11-05.jpg
−
| architecture = [[PDP-11]]
+
| imgwidth = 200px
 +
| caption = A PDP-11/05 in a 'low-boy' rack, from a sales brochure
 +
| manufacturer = [[Digital Equipment Corporation|DEC]]
 +
| architecture = [[PDP-11 architecture|PDP-11]]
 
| word size= 16 bit
 
| word size= 16 bit
−
| physical address= 18 bit (only 16 bits usable)
+
| physical address= 18 bits (only 16 bits usable)
 
| year introduced= June 1972
 
| year introduced= June 1972
 
| bus arch = [[UNIBUS]]
 
| bus arch = [[UNIBUS]]
 
}}
 
}}
 +
The '''PDP-11/05''' was the fourth model in the [[PDP-11]] series, following the [[PDP-11/20]], the [[PDP-11/45]] and the [[PDP-11/40]]; it used the [[KD11-B CPU]]. It was intended as a cost-reduced low-end machine to replace the PDP-11/20. Like all the other early PDP-11's, it was a [[UNIBUS]] machine.
  
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<!-- | image = pdp11-05.jpg
+
The PDP-11/05 was absolutely identical to the [[PDP-11/10]]; the only difference between the /05 and the /10 was the number printed on the [[front panel]] (the [[KY11-J Programmer's Console]]). The /05 was aimed toward the [[Original Equipment Manufacturer|OEM]] market, while the /10 was intended for [[end-user]]s. General usage (following DEC's lead) is to refer to all these machines as '11/05's.
−
| caption = a PDP-11/05 from a sales brochure. -->
 
−
 
 
−
The '''PDP-11/05''' was the fourth processor in the [[PDP-11]] series, following the [[PDP-11/20]], the [[PDP-11/45]] and the [[PDP-11/40]]; it used the '''KD11-B''' CPU. It was intended as a cost-reduced low-end machine to replace the PDP-11/20. Like all the other early PDP-11's, it was a [[UNIBUS]] machine.
 
  
−
The PDP-11/05 was identical to the [[PDP-11/10]]; the only difference between the /05 and the /10 was the number on the front panel. The /05 was aimed toward the [[OEM]] market, while the /10 was intended for end-users. General usage (following DEC's lead) is to refer to all these machines as '11/05s'.
+
The earliest units came in a 5-1/4" box, which had room for only a double [[system unit]] [[backplane]]. (Additional memory was initially indicated to require the use of an [[MM11-L core memory|ME11-L]] memory unit; similarly, a [[BA11-E Mounting Box]] was initially indicated as required to hold any [[device controller]]s beyond the limited number the [[Central Processing Unit|CPU]] backplane would hold. Alternative solutions to both were of course possible.) The [[power supply]] of this box does not have an 'Hxxx' assembly identifier, only a [[DEC part number]]: 70-08731; and 54-09728 for the DC Regulator Module.
  
−
The KD11-B was a two-board [[micro-programming|micro-programmed]] processor contained on two [[DEC card form factor|hex]] cards.  
+
A later version, the /05N and /10N, came in a 10-1/2" [[BA11-D Mounting Box]]; the final /05S and /10S versions came in the 10-1/2" [[BA11-K Mounting Box]].
  
 
==Backplane versions==
 
==Backplane versions==
  
−
The PDP-11/05 and /10 came in three versions, with different main backplanes (the 9-slot unit holding the two CPU cards).
+
The PDP-11/05 and /10 came in three versions, with four different versions of the main backplane (the 9-slot system unit holding the two CPU cards). All have two [[DEC card form factor|single-height]] slot sections for the [[KM11-A Maintenance Set|KM11 card]], plugged in to debug the CPU; each slot is numbered with the correct KD11-B KM11 overlay for a KM11 in that slot. (The KM11 switches function identically in both slots.)
−
 
 
−
The original /05 and /10 came with backplanes wired to hold [[MM11-L]] 16 Kbyte core memory units. There were two different backplanes: one held two memory units, with one slot left for [[Small Peripheral Controller|SPC]] devices; the other held one memory unit, and provided four SPC slots.
 
−
 
 
−
A second version, the /05N and /10N, came in a 10-1/2 inch box and had a slightly different backplane, which had space for two MM11-L memory units, but deleted the SPC slot of the previous double MM11-L backplane, and replaced it with a slot to hold the [[DEC card form factor|dual-height]] M9970 console terminal cable board.
 
−
 
 
−
The later /05S and /10S came with a backplane wired to hold an [[MM11-U]] 32 Kbyte core memory, and which provided three SPC slots.
 
−
 
 
−
==CPU board versions==
 
−
 
 
−
The two boards in the PDP-11/05-10 (the M7260 data paths module, and the M7261 control logic module) both come in two markedly-different versions, but unlike later practise (as in, e.g. the [[PDP-11/34]]), the two versions are not given different M-numbers, or clearly marked with a revision (i.e. 'M7260' and 'M7260-AA') on the handles.
 
−
 
 
−
One easy way to visually distinguish the early M7260 from later ones is that the later ones contain a circular selector switch in the upper left corner to select the baud rate of the built-in serial line; also, the position of the large [[UART]] chip has a different location (from down near the contact fingers, to up near the handles) and orientation (parellel to the board's long axis, in the earlier revision). For the M7261, the early version of the board has a large blank area, containing only traces, in the left middle area of the board.
 
−
 
 
−
The early revision of the M7260 is the 'B' revision; the later is the 'C' revision (the latter is marked as such, on the back side of the board- "M7260C"). For the M7261, two early revisions are the 'C' and 'E' revisions (the latter also similarly marked - "M7261E"); the later is the 'F' (also marked).
 
  
−
The early version of the M7260 only supports 110 baud operation; the latter has a circular selector switch which allows operation at a range of speeds from 110 baud up to 2400 baud; however, it is necessary to tweak a trim pot to change from the 110/220/440/880/1760 speed set to the 150/300/600/1200/2400 set.
+
===Original version===
  
−
The later revision of the M7261 contains two jumpers which are not present on the earlier revision. One (W1) disables to built-in serial line (which is 20mA, and limited to 2400 baud), allowing use of a more capable serial interface as the system console. The other (W2) disables the CPU from acting as a bus arbitrator, so that the machine can be a 'slave' processor, on a UNIBUS controlled by another CPU.
+
The original /05 and /10 came with backplanes wired to hold [[MM11-L core memory|MM11-L]] 16 Kbyte [[core memory]] units. There were two different backplanes (all four backplanes are un-named, but the part numbers, given below, are etched into the large [[printed circuit board|PCB]] on each).
  
−
==Control PROMs==
+
One, (called "Configuration 1" in [[Digital Equipment Corporation|DEC]] documentation, backplane part #54-10035), held two memory units, with one slot left for quad-height [[Small Peripheral Controller|SPC]] devices. The other ("Configuration 2", backplane part #54-09818) held one memory unit, and provided four SPC slots; it could also hold a [[DF11 Communications Line Adapter]] to convert the [[asynchronous serial line]] console line to [[EIA RS-232 serial line interface|EIA RS-232]].
  
−
The KD11-B makes extensive use of [[PROM]]s in place of random logic for control purposes; both boards contain a large number of PROMs. The two types used are IM5600 (or equivalent) 32x8 PROM, the IM5603 256x4 PROM (on the M7261), and the 74187 256x4 PROM (on the M7260).
+
Here are the slot assignments in the backplanes (as seen from the board insertion side of the backplane, not the [[wire-wrap]] pin side, as is common in DEC documentation) :
  
−
For the M7260 Data Paths board, the following table provides information on the PROMs on the early version (etch revision B) and late version (etch revision C). On the later version, the parts are all the same parts as the previous revision, but the chip numbering system for the board has been completely revised.
+
Configuration 1:
  
 
{| class="wikitable"
 
{| class="wikitable"
−
! Part # !! Type !! Rev. B !! Rev. C
+
! !! colspan="6" | Connector
−
|-
 
−
| A01A1 || 32x8 || E25 || E44
 
 
|-
 
|-
−
| A02A1 || 32x8 || colspan="2" style="text-align:center;" | E53
+
! Slot !! A !! B !! C !! D !! E !! F
 
|-
 
|-
−
| A03A1 || 32x8 || E61 || E54
+
| 1 || colspan="6" style="text-align:center;" | M7260 CPU board #0
 
|-
 
|-
−
| A03A2 || 256x4 || E59 || E72
+
| 2 || colspan="6" style="text-align:center;" | M7261 CPU board #1
 
|-
 
|-
−
| A04A1 || 32x8 || E64 || E65
+
| 3 || colspan="6" style="text-align:center;" | G110 Memory Control
 
|-
 
|-
−
| A05A1 || 32x8 || E66 || E59
+
| 4 || colspan="6" style="text-align:center;" | G231 Memory Driver
 
|-
 
|-
−
| A06A1 || 32x8 || E68 || E66
+
| 5 || colspan="2" | UNIBUS Terminator || colspan="4" | H213/H214 Core stack
 
|-
 
|-
−
| A08A1 || 32x8 || E69 || E78
+
| 6 || colspan="6" style="text-align:center;" | G110 Memory Control
 
|-
 
|-
−
| A10A1 || 32x8 || E71 || E77
+
| 7 || colspan="6" style="text-align:center;" | G231 Memory Driver
 
|-
 
|-
−
| A11A1 || 32x8 || E74 || E83
+
| 8 || colspan="2" | UNIBUS Out || colspan="4" | H213/H214 Core stack
 
|-
 
|-
−
| A12A1 || 32x8 || E82 || E69
+
| 9 || KM11-1 || KM11-2 || colspan="4" style="text-align:center;" | SPC
 
|}
 
|}
  
−
For the M7261 Control Logic and Microprogram board, the following table provides information on the PROMs on the early version (etch revisions C and E) and late version (etch revision F). On the later version, the parts are mostly the same parts as the previous revision, but the chip numbering system for the board has been completely revised.
+
Configuration 2:
  
 
{| class="wikitable"
 
{| class="wikitable"
−
! Function !! Type !! Part # !! Rev. C !! Rev. E !! Rev. F
+
! !! colspan="6" | Connector
 
|-
 
|-
−
| Bus Request -> Grant processing || 256x4 || A01A2 || colspan="2" style="text-align:center;" | E12 || E24
+
! Slot !! A !! B !! C !! D !! E !! F
 
|-
 
|-
−
| Internal address decode (first stage) || 256x4 || A02A2 || colspan="2" style="text-align:center;" | E30 || E53
+
| 1 || colspan="6" style="text-align:center;" | M7260 CPU board #0
 
|-
 
|-
−
| Microprogram - Next instruction (high bits) || 256x4 || A04A2 || colspan="2" style="text-align:center;" | E92 || E102
+
| 2 || colspan="6" style="text-align:center;" | M7261 CPU board #1
 
|-
 
|-
−
| Microprogram - Processor Status Word control || 256x4 || A05A2 || colspan="2" style="text-align:center;" | E93 || E104
+
| 3 || colspan="6" style="text-align:center;" | G110 Memory Control
 
|-
 
|-
−
| Internal address decode (second stage) || 32x8 || A07A1 || colspan="2" style="text-align:center;" | E68 || E71
+
| 4 || colspan="6" style="text-align:center;" | G231 Memory Driver
 
|-
 
|-
−
| rowspan="2"|Microprogram - Bus control || rowspan="2"|256x4 || A07A2 || E95 || ||
+
| 5 || colspan="2" | UNIBUS Terminator || colspan="4" | H213/H214 Core stack
 
|-
 
|-
−
| A17A2 || || E95 || E106
+
| 6 || colspan="2" | Unused || colspan="4" style="text-align:center;" | SPC
 
|-
 
|-
−
| Internal address decode (second stage) || 32x8 || A09A1 || colspan="2" style="text-align:center;" | E69 || E72
+
| 7 || colspan="2" | UNIBUS Out || colspan="4" style="text-align:center;" | SPC
 
|-
 
|-
−
| Branch utest service || 256x4 || A09A2 || colspan="2" style="text-align:center;" | E101 || E107
+
| 8 || KM11-1 || KM11-2 || colspan="4" style="text-align:center;" | SPC
 
|-
 
|-
−
| Microprogram - Next instruction (low bits) || 256x4 || A10A2 || colspan="2" style="text-align:center;" | E103 || E112
+
| 9 || colspan="2" | DF11 || colspan="4" style="text-align:center;" | SPC
−
|-
+
|}
−
| Microprogram - ALU operation select || 256x4 || A11A2 || colspan="2" style="text-align:center;" |E104 || E114
+
 
−
|-
+
Note that the slots are numbered from 1 at the start; this is the inverse of the numbering for these backplanes in some DEC documentation.
−
| rowspan="2"|Microprogram - Branch utest || rowspan="2"|256x4 || A12A2 || colspan="2" style="text-align:center;" | E105 ||
+
 
 +
===-N type===
 +
 
 +
The /05N and /10N had a slightly different backplane (part #54-10329; the complete unit has been observed labelled "Type: 10 5K", "Part No.: 70-09241"). This had space for two MM11-L memory units, but deleted the SPC slot of the previous double MM11-L backplane, and replaced it with a slot to hold the dual-height M9970 console terminal cable board, and also a dual-height DF11.
 +
 
 +
Board locations (again, as seen from the board insertion side of the backplane) are:
 +
 
 +
{| class="wikitable"
 +
! !! colspan="6" | Connector
 
|-
 
|-
−
| A18A2 || colspan="2"| || E113
+
! Slot !! A !! B !! C !! D !! E !! F
 
|-
 
|-
−
| Internal interrupt acknowledge || 32x8 || A13A1 || colspan="2" style="text-align:center;" | E90 || <sup>1</sup>
+
| 1 || colspan="2" | DF11 || colspan="2" | M9970 || KM11-A || KM11-B
 
|-
 
|-
−
| Microprogram - Multiplexor control || 256x4 || A13A2 || colspan="2" style="text-align:center;" | E106 || E115
+
| 2 || colspan="6" style="text-align:center;" | M7260 CPU board #0
 
|-
 
|-
−
| rowspan="2"|Console switch control || rowspan="2"|32x8 || A14A1 || E100 || || E108<sup>2</sup>
+
| 3 || colspan="6" style="text-align:center;" | M7261 CPU board #1
 
|-
 
|-
−
| A16A1<sup>3</sup> || || E100 ||
+
| 4 || colspan="2" | UNIBUS Terminator || colspan="4" | H213/H214 Core stack
 
|-
 
|-
−
| rowspan="2"|Microprogram - Bus control || rowspan="2"|256x4 || A14A2 || colspan="2" style="text-align:center;" | E107 ||
+
| 5 || colspan="6" style="text-align:center;" | G110 Memory Control
 
|-
 
|-
−
| A19A2 || colspan="2"| || E116
+
| 6 || colspan="6" style="text-align:center;" | G231 Memory Driver
 
|-
 
|-
−
| rowspan="2"|Microprogram - ALU control || rowspan="2"|256x4 || A15A2 || colspan="2" style="text-align:center;" | E94 ||
+
| 7 || colspan="6" style="text-align:center;" | G110 Memory Control
 
|-
 
|-
−
| A20A2 || colspan="2"| || E103
+
| 8 || colspan="6" style="text-align:center;" | G231 Memory Driver
 
|-
 
|-
−
| Microprogram - Miscellaneous || 256x4 || A16A2<sup>4</sup> || colspan="2" style="text-align:center;" | E96 || E105
+
| 9 || colspan="2" | UNIBUS Out || colspan="4" | H213/H214 Core stack
 
|}
 
|}
  
−
''Notes:''
+
Note that the two KM11 slots are at the other side of the backplane from the slots used for them in the 'Configuration 1' and 'Configuration 2' backplanes.
−
 
 
−
1 - Note that the later version of this board (the 'F' etch revision) has one less PROM than the earlier; it was replaced by a 74154 4->16 demultiplexor (at E110).
 
−
 
 
−
2 - The later version of the board appears to have reverted to an A14A1 (both the parts list, and drawing, show an A14A1); the reason is unknown.
 
−
 
 
−
3 - For the 'E' etch revision, the actual drawing shows an A14A1 at location E100, not an A16A1, but the later one is in the parts list.
 
−
 
 
−
4 - It appears that on an earlier revision of the prints, the chip in E96 (A16A2 in the C etch revision) was actually a different version, A8A2; the prints for the 'C' etch revision show the later one in the parts list, but the earlier one in the actual drawing.
 
−
 
 
−
==Prints==
 
  
−
Prints for both major versions of the CPU cards are available online; the earlier ones may be found in the [[GT40]] Engineering Drawings set dated February, 1973 (pp. 141-150 for the M7260, and pp. 162-173 for the M7261).
+
===-S type===
  
−
The following table contains details of exactly which board etch revisions are covered in which sets of prints, for both boards:
+
The /05S and /10S came with a backplane (part #54-10972, complete assembly part #70-09921) wired to hold an [[MM11-U core memory|MM11-U]] 32 Kbyte core memory, and which provided three SPC slots. The layout (from the board insertion side) is:
  
 
{| class="wikitable"
 
{| class="wikitable"
−
! Drawing Set !! Date !! M7260 !! M7261
+
! !! colspan="6" | Connector
 +
|-
 +
! Slot !! A !! B !! C !! D !! E !! F
 +
|-
 +
| 1 || colspan="6" style="text-align:center;" | M7260 CPU board #0
 +
|-
 +
| 2 || colspan="6" style="text-align:center;" | M7261 CPU board #1
 +
|-
 +
| 3 || colspan="2" | UNIBUS Terminator || colspan="4" style="text-align:center;" | SPC
 +
|-
 +
| 4 || colspan="2" | DF11 or M9970 || colspan="4" style="text-align:center;" | SPC
 +
|-
 +
| 5 || KM11-1 || KM11-2 || colspan="4" style="text-align:center;" | SPC
 
|-
 
|-
−
| PDP-11/05 Engineering Drawings, Revision B (not online yet) || May, 1972 || B || C
+
| 6 || colspan="6" style="text-align:center;" | G235 X-Y Drive
 
|-
 
|-
−
| GT40 Engineering Drawings || February, 1973 || B || E
+
| 7 || colspan="6" style="text-align:center;" | H217-D Core Stack
 
|-
 
|-
−
| PDP-11/05S System Engineering Drawings, Revision D || October, 1974 || C || F
+
| 8 || colspan="6" style="text-align:center;" | G114 Sense/Inhibit
 
|-
 
|-
−
| PDP-11/05 Engineering Drawings, Revision AH || July, 1976 || C || F
+
| 9 || colspan="2" | UNIBUS Out || colspan="4" style="text-align:center;" | M8293 Memory Control
 
|}
 
|}
  
 
==Keys==
 
==Keys==
  
−
Unlike all the other PDP-11s, which use a circular Ace key, the /05's (and /10s) use a normal flat Yale-type key. The original key is a Chicago Lock Company key, code "GRB 2"; this is cut 215, on a Chicago K5K or Ilco S1041T blank. If simply duplicating an existing key, Hillman Y11 and FR4 blanks may be used (both work, but
+
Unlike all the other keyed PDP-11s, which use a cylindrical Ace key, the /05's (and /10s) use a normal flat Yale-type key. The original key is a Chicago Lock Company key, code "GRB 2"; this is cut 215, on a Chicago K5K or Ilco S1041T blank. (It has been confirmed that a locksmith was able to produce a working key from this information.) If simply duplicating an existing key, Hillman Y11 and FR4 blanks may be used (both work, but one has to be trimmed a bit, length-wise).
−
one has to be trimmed a bit, length-wise).
 
  
−
== Gallery ==
+
==Gallery==
  
 
[[Image:PDP1105.jpg|150px]]
 
[[Image:PDP1105.jpg|150px]]
 
[[Image:1105.jpg|150px]]
 
[[Image:1105.jpg|150px]]
  
−
{{PDP-11}}
+
==External links==
 +
 
 +
* [http://www.bitsavers.org/pdf/dec/pdp11/1105/ PDP-11/05] - BitSavers
 +
** [http://bitsavers.org/pdf/dec/pdp11/1105/DEC-11-H05AA-A-D_1105um.pdf PDP-11/05 computer manual] (DEC-11-H05AA-A-D) - covers the initial 5-1/4 inch box version; the power supply is covered in ''Part IV: Power Supply'' (pp. 276-313 of the PDF)
 +
** [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/DEC-11-H05AA-B-D%20PDP-11-05,%2011-10%20Computer%20Manual.pdf PDP-11/05, 11/10 computer manual] (DEC-11-H05AA-B-D) - also covers the first 10-1/2" box version, in ''Supplement 1: PDP-11/05, 11/10 10 1/2 inch mounting box and power system'' (pp. 291-372 of the PDF)
 +
** [http://www.bitsavers.org/pdf/dec/pdp11/1105/1105_RevAH_Engineering_Drawings_Jul76.pdf 16 bit computer (PDP 1105) engineering drawings] - covers the 5-1/4" box, and the first 10-1/2" box version (doesn't seem to have the 5-1/4" box power supply, though)
 +
** [http://www.bitsavers.org/pdf/dec/pdp11/1105/1105S_Schem.pdf  PDP-11/05-S, 11/10-S systems engineering drawings]
 +
* [https://vt100.net/mirror/hcps/h05ssbd.pdf PDP-11/05-S, 11/10-S system manual] (DEC-11-H05SS-B-D) - covers the second 10-1/2" box version
 +
* [http://www.vaxhaven.com/images/7/76/EK-11005-TM-003.pdf PDP-11/05, 11/10 computer manual] (EK-11005-TM-003) - does not cover the later 10-1/2" box version; covers the first version in Chapters 17-19 (pp. 154-216 of the PDF)
 +
 
 +
{{Nav PDP-11}}
  
−
[[Category:DEC processors]]
+
[[Category:UNIBUS PDP-11s]]
−
[[Category:UNIBUS processors]]
 

Latest revision as of 18:18, 8 February 2024


PDP-11/05
Pdp11-05.jpg
A PDP-11/05 in a 'low-boy' rack, from a sales brochure
Manufacturer: DEC
Architecture: PDP-11
Year Introduced: June 1972
Word Size: 16 bit
Physical Address Size: 18 bits (only 16 bits usable)
Bus Architecture: UNIBUS

The PDP-11/05 was the fourth model in the PDP-11 series, following the PDP-11/20, the PDP-11/45 and the PDP-11/40; it used the KD11-B CPU. It was intended as a cost-reduced low-end machine to replace the PDP-11/20. Like all the other early PDP-11's, it was a UNIBUS machine.

The PDP-11/05 was absolutely identical to the PDP-11/10; the only difference between the /05 and the /10 was the number printed on the front panel (the KY11-J Programmer's Console). The /05 was aimed toward the OEM market, while the /10 was intended for end-users. General usage (following DEC's lead) is to refer to all these machines as '11/05's.

The earliest units came in a 5-1/4" box, which had room for only a double system unit backplane. (Additional memory was initially indicated to require the use of an ME11-L memory unit; similarly, a BA11-E Mounting Box was initially indicated as required to hold any device controllers beyond the limited number the CPU backplane would hold. Alternative solutions to both were of course possible.) The power supply of this box does not have an 'Hxxx' assembly identifier, only a DEC part number: 70-08731; and 54-09728 for the DC Regulator Module.

A later version, the /05N and /10N, came in a 10-1/2" BA11-D Mounting Box; the final /05S and /10S versions came in the 10-1/2" BA11-K Mounting Box.

Backplane versions

The PDP-11/05 and /10 came in three versions, with four different versions of the main backplane (the 9-slot system unit holding the two CPU cards). All have two single-height slot sections for the KM11 card, plugged in to debug the CPU; each slot is numbered with the correct KD11-B KM11 overlay for a KM11 in that slot. (The KM11 switches function identically in both slots.)

Original version

The original /05 and /10 came with backplanes wired to hold MM11-L 16 Kbyte core memory units. There were two different backplanes (all four backplanes are un-named, but the part numbers, given below, are etched into the large PCB on each).

One, (called "Configuration 1" in DEC documentation, backplane part #54-10035), held two memory units, with one slot left for quad-height SPC devices. The other ("Configuration 2", backplane part #54-09818) held one memory unit, and provided four SPC slots; it could also hold a DF11 Communications Line Adapter to convert the asynchronous serial line console line to EIA RS-232.

Here are the slot assignments in the backplanes (as seen from the board insertion side of the backplane, not the wire-wrap pin side, as is common in DEC documentation) :

Configuration 1:

Connector
Slot A B C D E F
1 M7260 CPU board #0
2 M7261 CPU board #1
3 G110 Memory Control
4 G231 Memory Driver
5 UNIBUS Terminator H213/H214 Core stack
6 G110 Memory Control
7 G231 Memory Driver
8 UNIBUS Out H213/H214 Core stack
9 KM11-1 KM11-2 SPC

Configuration 2:

Connector
Slot A B C D E F
1 M7260 CPU board #0
2 M7261 CPU board #1
3 G110 Memory Control
4 G231 Memory Driver
5 UNIBUS Terminator H213/H214 Core stack
6 Unused SPC
7 UNIBUS Out SPC
8 KM11-1 KM11-2 SPC
9 DF11 SPC

Note that the slots are numbered from 1 at the start; this is the inverse of the numbering for these backplanes in some DEC documentation.

-N type

The /05N and /10N had a slightly different backplane (part #54-10329; the complete unit has been observed labelled "Type: 10 5K", "Part No.: 70-09241"). This had space for two MM11-L memory units, but deleted the SPC slot of the previous double MM11-L backplane, and replaced it with a slot to hold the dual-height M9970 console terminal cable board, and also a dual-height DF11.

Board locations (again, as seen from the board insertion side of the backplane) are:

Connector
Slot A B C D E F
1 DF11 M9970 KM11-A KM11-B
2 M7260 CPU board #0
3 M7261 CPU board #1
4 UNIBUS Terminator H213/H214 Core stack
5 G110 Memory Control
6 G231 Memory Driver
7 G110 Memory Control
8 G231 Memory Driver
9 UNIBUS Out H213/H214 Core stack

Note that the two KM11 slots are at the other side of the backplane from the slots used for them in the 'Configuration 1' and 'Configuration 2' backplanes.

-S type

The /05S and /10S came with a backplane (part #54-10972, complete assembly part #70-09921) wired to hold an MM11-U 32 Kbyte core memory, and which provided three SPC slots. The layout (from the board insertion side) is:

Connector
Slot A B C D E F
1 M7260 CPU board #0
2 M7261 CPU board #1
3 UNIBUS Terminator SPC
4 DF11 or M9970 SPC
5 KM11-1 KM11-2 SPC
6 G235 X-Y Drive
7 H217-D Core Stack
8 G114 Sense/Inhibit
9 UNIBUS Out M8293 Memory Control

Keys

Unlike all the other keyed PDP-11s, which use a cylindrical Ace key, the /05's (and /10s) use a normal flat Yale-type key. The original key is a Chicago Lock Company key, code "GRB 2"; this is cut 215, on a Chicago K5K or Ilco S1041T blank. (It has been confirmed that a locksmith was able to produce a working key from this information.) If simply duplicating an existing key, Hillman Y11 and FR4 blanks may be used (both work, but one has to be trimmed a bit, length-wise).

Gallery

PDP1105.jpg 1105.jpg

External links


v • d • e PDP-11 Computers and Peripherals
UNIBUS PDP-11s - PDP-11/20 • PDP-11/15 • PDP-11/35 • PDP-11/40 • PDP-11/45 • PDP-11/50 • PDP-11/55 • PDP-11/70
PDP-11/05 • PDP-11/10 • PDP-11/04 • PDP-11/34 • PDP-11/60 • PDP-11/44 • PDP-11/24 • PDP-11/84 • PDP-11/94

QBUS PDP-11s - PDP-11/03 • PDP-11/23 • PDP-11/23+ • MicroPDP-11/73 • MicroPDP-11/53 • MicroPDP-11/83 • MicroPDP-11/93

QBUS CPUs: LSI-11 • LSI-11/2 • KDF11-A • KDF11-B • KDJ11-A • KDJ11-B • KDJ11-D • KDJ11-E

Buses: UNIBUS • UNIBUS map • SPC • MUD • EUB • QBUS • CD interconnect • PMI

Also: PDP-11 architecture • PDP-11 Extended Instruction Set • FP11 floating point • PDP-11 Memory Management

UNIBUS CPUs: KA11 • KC11 • KB11-A • KB11-B • KB11-C • KB11-D • KD11-A • KD11-B • KD11-D • KD11-E • KD11-EA • KD11-K • KD11-Z • KDF11-U

Co-processors: FP11-A • FP11-B • FP11-C • FP11-E • FP11-F • KE44-A • FPF11

Chips: LSI-11 • KEV11-A • KEV11-B • KEV11-C • F-11 • KEF11-A • KTF11-A • T-11 • J-11 • FPJ11

CPU options: KE11-E • KE11-F • KJ11-A • KT11-C • KT11-D • KK11-A • KK11-B • KT24 • KTJ11-B

Rare CPU options: KS11 Memory Protection and Relocation option • KT11-B Paging Option • KUV11 Writeable Control Store

Front panels: KY11-A • KY11-D • KY11-J • KY11-LA • KY11-LB • KY11-P

More on buses: UNIBUS and QBUS termination • Bus Arbitration on the Unibus and QBUS • CTI BUS

PDT-11s - PDT-11/110 • PDT-11/130 • PDT-11/150   CTI PDP-11s - PRO-325 • PRO-350 • PRO-380

Clones: CM 1420 • SM 1420

Other: FIS floating point • PDP-11 Commercial Instruction Set • PDP-11 stacks • PDP-11 family differences

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